llvm-6502/test/CodeGen
Mon P Wang eb38ebf15c Improved widening loads by adding support for wider loads if
the alignment allows.  Fixed a bug where we didn't use a
vector load/store for PR5626.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94338 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-24 00:05:03 +00:00
..
Alpha
ARM Revert LoopStrengthReduce.cpp to pre-r94061 for now. 2010-01-22 00:46:49 +00:00
Blackfin Teach dag combine to fold the following transformation more aggressively: 2010-01-06 19:38:29 +00:00
CBackend
CellSPU don't let asm-verbose break the check-next lines in these tests. 2010-01-19 06:39:54 +00:00
CPP
Generic remove this test. 2010-01-23 03:11:10 +00:00
Mips
MSP430 Reenable tests 2010-01-15 21:19:26 +00:00
PIC16 emit integer and fp zeros as (e.g.) .byte 0 instead of .space 1, 2010-01-20 07:19:19 +00:00
PowerPC stop testing for invalid output. 2010-01-23 05:45:28 +00:00
SPARC
SystemZ Teach dag combine to fold the following transformation more aggressively: 2010-01-06 19:38:29 +00:00
Thumb Run the pre-register allocation tail duplication pass by default. Remove 2010-01-16 00:29:50 +00:00
Thumb2 Revert LoopStrengthReduce.cpp to pre-r94061 for now. 2010-01-22 00:46:49 +00:00
X86 Improved widening loads by adding support for wider loads if 2010-01-24 00:05:03 +00:00
XCore