mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-21 16:31:16 +00:00
d0dbe02fd2
The C and C++ semantics for compare_exchange require it to return a bool indicating success. This gets mapped to LLVM IR which follows each cmpxchg with an icmp of the value loaded against the desired value. When lowered to ldxr/stxr loops, this extra comparison is redundant: its results are implicit in the control-flow of the function. This commit makes two changes: it replaces that icmp with appropriate PHI nodes, and then makes sure earlyCSE is called after expansion to actually make use of the opportunities revealed. I've also added -{arm,aarch64}-enable-atomic-tidy options, so that existing fragile tests aren't perturbed too much by the change. Many of them either rely on undef/unreachable too pervasively to be restored to something well-defined (particularly while making sure they test the same obscure assert from many years ago), or depend on a particular CFG shape, which is disrupted by SimplifyCFG. rdar://problem/16227836 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209883 91177308-0d34-0410-b5e6-96231b3b80d8
60 lines
1.4 KiB
LLVM
60 lines
1.4 KiB
LLVM
; RUN: llc -O3 < %s -aarch64-atomic-cfg-tidy=0 | FileCheck %s
|
|
target triple = "arm64-apple-ios"
|
|
|
|
; rdar://12462006
|
|
; CSE between "icmp reg reg" and "sub reg reg".
|
|
; Both can be in the same basic block or in different basic blocks.
|
|
define i8* @t1(i8* %base, i32* nocapture %offset, i32 %size) nounwind {
|
|
entry:
|
|
; CHECK-LABEL: t1:
|
|
; CHECK: subs
|
|
; CHECK-NOT: cmp
|
|
; CHECK-NOT: sub
|
|
; CHECK: b.ge
|
|
; CHECK: sub
|
|
; CHECK: sub
|
|
; CHECK-NOT: sub
|
|
; CHECK: ret
|
|
%0 = load i32* %offset, align 4
|
|
%cmp = icmp slt i32 %0, %size
|
|
%s = sub nsw i32 %0, %size
|
|
br i1 %cmp, label %return, label %if.end
|
|
|
|
if.end:
|
|
%sub = sub nsw i32 %0, %size
|
|
%s2 = sub nsw i32 %s, %size
|
|
%s3 = sub nsw i32 %sub, %s2
|
|
store i32 %s3, i32* %offset, align 4
|
|
%add.ptr = getelementptr inbounds i8* %base, i32 %sub
|
|
br label %return
|
|
|
|
return:
|
|
%retval.0 = phi i8* [ %add.ptr, %if.end ], [ null, %entry ]
|
|
ret i8* %retval.0
|
|
}
|
|
|
|
; CSE between "icmp reg imm" and "sub reg imm".
|
|
define i8* @t2(i8* %base, i32* nocapture %offset) nounwind {
|
|
entry:
|
|
; CHECK-LABEL: t2:
|
|
; CHECK: subs
|
|
; CHECK-NOT: cmp
|
|
; CHECK-NOT: sub
|
|
; CHECK: b.lt
|
|
; CHECK-NOT: sub
|
|
; CHECK: ret
|
|
%0 = load i32* %offset, align 4
|
|
%cmp = icmp slt i32 %0, 1
|
|
br i1 %cmp, label %return, label %if.end
|
|
|
|
if.end:
|
|
%sub = sub nsw i32 %0, 1
|
|
store i32 %sub, i32* %offset, align 4
|
|
%add.ptr = getelementptr inbounds i8* %base, i32 %sub
|
|
br label %return
|
|
|
|
return:
|
|
%retval.0 = phi i8* [ %add.ptr, %if.end ], [ null, %entry ]
|
|
ret i8* %retval.0
|
|
}
|