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6824f127f9
System z branches have a mask to select which of the 4 CC values should cause the branch to be taken. We can invert a branch by inverting the mask. However, not all instructions can produce all 4 CC values, so inverting the branch like this can lead to some oddities. For example, integer comparisons only produce a CC of 0 (equal), 1 (less) or 2 (greater). If an integer EQ is reversed to NE before instruction selection, the branch will test for 1 or 2. If instead the branch is reversed after instruction selection (by inverting the mask), it will test for 1, 2 or 3. Both are correct, but the second isn't really canonical. This patch therefore keeps track of which CC values are possible and uses this when inverting a mask. Although this is mostly cosmestic, it fixes undefined behavior for the CIJNLH in branch-08.ll. Another fix would have been to mask out bit 0 when generating the fused compare and branch, but the point of this patch is that we shouldn't need to do that in the first place. The patch also makes it easier to reuse CC results from other instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187495 91177308-0d34-0410-b5e6-96231b3b80d8
56 lines
1.9 KiB
LLVM
56 lines
1.9 KiB
LLVM
; Test 16-bit atomic exchange.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT
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; Check exchange with a variable.
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; - CHECK is for the main loop.
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; - CHECK-SHIFT makes sure that the negated shift count used by the second
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; RLL is set up correctly. The negation is independent of the NILL and L
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; tested in CHECK. CHECK-SHIFT also checks that %r3 is not modified before
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; being used in the RISBG (in contrast to things like atomic addition,
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; which shift %r3 left so that %b is at the high end of the word).
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define i16 @f1(i16 *%src, i16 %b) {
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; CHECK-LABEL: f1:
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; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
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; CHECK: nill %r2, 65532
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; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
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; CHECK: [[LABEL:\.[^:]*]]:
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; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
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; CHECK: risbg [[ROT]], %r3, 32, 47, 16
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; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
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; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
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; CHECK: jl [[LABEL]]
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; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
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; CHECK: br %r14
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;
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; CHECK-SHIFT-LABEL: f1:
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; CHECK-SHIFT-NOT: %r3
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; CHECK-SHIFT: sllg [[SHIFT:%r[1-9]+]], %r2, 3
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; CHECK-SHIFT-NOT: %r3
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; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
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; CHECK-SHIFT-NOT: %r3
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; CHECK-SHIFT: rll
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; CHECK-SHIFT-NOT: %r3
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; CHECK-SHIFT: risbg {{%r[0-9]+}}, %r3, 32, 47, 16
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; CHECK-SHIFT: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
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; CHECK-SHIFT: rll
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; CHECK-SHIFT: br %r14
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%res = atomicrmw xchg i16 *%src, i16 %b seq_cst
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ret i16 %res
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}
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; Check exchange with a constant. We should force the constant into
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; a register and use the sequence above.
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define i16 @f2(i16 *%src) {
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; CHECK-LABEL: f2:
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; CHECK: lhi [[VALUE:%r[0-9]+]], -25536
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; CHECK: risbg {{%r[0-9]+}}, [[VALUE]], 32, 47, 16
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; CHECK: br %r14
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;
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; CHECK-SHIFT-LABEL: f2:
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; CHECK-SHIFT: br %r14
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%res = atomicrmw xchg i16 *%src, i16 40000 seq_cst
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ret i16 %res
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}
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