Oliver Stannard eb922109f9 Teach the AArch64 backend to handle f16 ... This allows the AArch64 backend to handle fadd, fsub, fmul and fdiv operations on f16 (half-precision) types by promoting to f32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215891 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-18 14:22:39 +00:00
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AArch64	Teach the AArch64 backend to handle f16	2014-08-18 14:22:39 +00:00
ARM	[ARM,AArch64] Do not tail-call to an externally-defined function with weak linkage	2014-08-18 12:42:15 +00:00
CPP	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
Generic	Use "weak alias" instead of "alias weak"	2014-07-30 22:51:54 +00:00
Hexagon	DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range.	2014-08-06 00:21:25 +00:00
Inputs
Mips	Fix fmul combines with constant splat vectors	2014-08-16 10:14:19 +00:00
MSP430
NVPTX	[NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types	2014-07-23 20:23:49 +00:00
PowerPC	[PowerPC] Mark fixed-offset byvals as pointed-to by IR values	2014-08-16 00:17:05 +00:00
R600	R600/SI: Move all fabs / fneg handling to patterns	2014-08-15 18:42:22 +00:00
SPARC	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
SystemZ	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
Thumb	ARM: Fix and re-enable load/store optimizer for Thumb1.	2014-08-15 17:00:30 +00:00
Thumb2	ARM: do not generate BLX instructions on Cortex-M CPUs.	2014-08-06 11:13:14 +00:00
X86	AVX-512: Fixed a bug in emitting compare for MVT:i1 type.	2014-08-18 11:59:06 +00:00
XCore	llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.	2014-07-04 11:58:03 +00:00