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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-26 07:29:55 +00:00
Update the entire regression test suite for the new shuffles. Remove most of the old testing which was devoted to the old shuffle lowering path and is no longer relevant really. Also remove a few other random tests that only really exercised shuffles and only incidently or without any interesting aspects to them. Benchmarking that I have done shows a few small regressions with this on LNT, zero measurable regressions on real, large applications, and for several benchmarks where the loop vectorizer fires in the hot path it shows 5% to 40% improvements for SSE2 and SSE3 code running on Sandy Bridge machines. Running on AMD machines shows even more dramatic improvements. When using newer ISA vector extensions the gains are much more modest, but the code is still better on the whole. There are a few regressions being tracked (PR21137, PR21138, PR21139) but by and large this is expected to be a win for x86 generated code performance. It is also more correct than the code it replaces. I have fuzz tested this extensively with ISA extensions up through AVX2 and found no crashes or miscompiles (yet...). The old lowering had a few miscompiles and crashers after a somewhat smaller amount of fuzz testing. There is one significant area where the new code path lags behind and that is in AVX-512 support. However, there was *extremely little* support for that already and so this isn't a significant step backwards and the new framework will probably make it easier to implement lowering that uses the full power of AVX-512's table-based shuffle+blend (IMO). Many thanks to Quentin, Andrea, Robert, and others for benchmarking assistance. Thanks to Adam and others for help with AVX-512. Thanks to Hal, Eric, and *many* others for answering my incessant questions about how the backend actually works. =] I will leave the old code path in the tree until the 3 PRs above are at least resolved to folks' satisfaction. Then I will rip it (and 1000s of lines of code) out. =] I don't expect this flag to stay around for very long. It may not survive next week. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219046 91177308-0d34-0410-b5e6-96231b3b80d8
441 lines
17 KiB
LLVM
441 lines
17 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
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; Test that we correctly fold a shuffle that performs a swizzle of another
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; shuffle node according to the rule
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; shuffle (shuffle (x, undef, M0), undef, M1) -> shuffle(x, undef, M2)
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;
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; We only do this if the resulting mask is legal to avoid introducing an
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; illegal shuffle that is expanded into a sub-optimal sequence of instructions
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; during lowering stage.
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define <4 x i32> @swizzle_1(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_1:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,3,2]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1>
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ret <4 x i32> %2
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}
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define <4 x i32> @swizzle_2(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_2:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,3,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2>
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ret <4 x i32> %2
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}
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define <4 x i32> @swizzle_3(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_3:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,3,2]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0>
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ret <4 x i32> %2
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}
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define <4 x i32> @swizzle_4(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_4:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,0,2]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0>
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ret <4 x i32> %2
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}
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define <4 x i32> @swizzle_5(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_5:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
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ret <4 x i32> %2
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}
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define <4 x i32> @swizzle_6(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_6:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,0,1,3]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3>
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ret <4 x i32> %2
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}
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define <4 x i32> @swizzle_7(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_7:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,3,1]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2>
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ret <4 x i32> %2
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}
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define <4 x i32> @swizzle_8(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_8:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1>
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ret <4 x i32> %2
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}
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define <4 x i32> @swizzle_9(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_9:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2>
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ret <4 x i32> %2
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}
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define <4 x i32> @swizzle_10(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_10:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,2,0,3]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3>
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ret <4 x i32> %2
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}
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define <4 x i32> @swizzle_11(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_11:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1>
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ret <4 x i32> %2
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}
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define <4 x i32> @swizzle_12(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_12:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,1,2]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1>
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ret <4 x i32> %2
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}
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define <4 x i32> @swizzle_13(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_13:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2>
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ret <4 x i32> %2
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}
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define <4 x i32> @swizzle_14(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_14:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,0,2,1]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0>
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ret <4 x i32> %2
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}
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define <4 x float> @swizzle_15(<4 x float> %v) {
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; CHECK-LABEL: swizzle_15:
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; CHECK: # BB#0:
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0,3,2]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1>
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ret <4 x float> %2
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}
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define <4 x float> @swizzle_16(<4 x float> %v) {
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; CHECK-LABEL: swizzle_16:
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; CHECK: # BB#0:
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,1,3,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2>
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ret <4 x float> %2
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}
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define <4 x float> @swizzle_17(<4 x float> %v) {
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; CHECK-LABEL: swizzle_17:
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; CHECK: # BB#0:
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0,3,2]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0>
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ret <4 x float> %2
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}
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define <4 x float> @swizzle_18(<4 x float> %v) {
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; CHECK-LABEL: swizzle_18:
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; CHECK: # BB#0:
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,0,2]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0>
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ret <4 x float> %2
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}
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define <4 x float> @swizzle_19(<4 x float> %v) {
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; CHECK-LABEL: swizzle_19:
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; CHECK: # BB#0:
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; CHECK-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
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ret <4 x float> %2
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}
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define <4 x float> @swizzle_20(<4 x float> %v) {
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; CHECK-LABEL: swizzle_20:
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; CHECK: # BB#0:
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3>
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ret <4 x float> %2
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}
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define <4 x float> @swizzle_21(<4 x float> %v) {
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; CHECK-LABEL: swizzle_21:
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; CHECK: # BB#0:
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2>
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ret <4 x float> %2
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}
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define <4 x float> @swizzle_22(<4 x float> %v) {
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; CHECK-LABEL: swizzle_22:
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; CHECK: # BB#0:
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3,2,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1>
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ret <4 x float> %2
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}
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define <4 x float> @swizzle_23(<4 x float> %v) {
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; CHECK-LABEL: swizzle_23:
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; CHECK: # BB#0:
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; CHECK-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2>
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ret <4 x float> %2
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}
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define <4 x float> @swizzle_24(<4 x float> %v) {
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; CHECK-LABEL: swizzle_24:
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; CHECK: # BB#0:
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2,0,3]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3>
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ret <4 x float> %2
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}
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define <4 x float> @swizzle_25(<4 x float> %v) {
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; CHECK-LABEL: swizzle_25:
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; CHECK: # BB#0:
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1>
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ret <4 x float> %2
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}
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define <4 x float> @swizzle_26(<4 x float> %v) {
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; CHECK-LABEL: swizzle_26:
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; CHECK: # BB#0:
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3,1,2]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1>
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ret <4 x float> %2
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}
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define <4 x float> @swizzle_27(<4 x float> %v) {
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; CHECK-LABEL: swizzle_27:
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; CHECK: # BB#0:
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2>
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ret <4 x float> %2
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}
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define <4 x float> @swizzle_28(<4 x float> %v) {
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; CHECK-LABEL: swizzle_28:
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; CHECK: # BB#0:
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0,2,1]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0>
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ret <4 x float> %2
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}
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define <4 x float> @swizzle_29(<4 x float> %v) {
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; CHECK-LABEL: swizzle_29:
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; CHECK: # BB#0:
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3,2,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 1, i32 2, i32 0>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 2, i32 3>
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ret <4 x float> %2
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}
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; Make sure that we combine the shuffles from each function below into a single
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; legal shuffle (either pshuflw or pshufb depending on the masks).
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|
define <8 x i16> @swizzle_30(<8 x i16> %v) {
|
|
; CHECK-LABEL: swizzle_30:
|
|
; CHECK: # BB#0:
|
|
; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,3,2,0,4,5,6,7]
|
|
; CHECK-NEXT: retq
|
|
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 3, i32 1, i32 2, i32 0, i32 7, i32 5, i32 6, i32 4>
|
|
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 1, i32 0, i32 2, i32 3, i32 7, i32 5, i32 6, i32 4>
|
|
ret <8 x i16> %2
|
|
}
|
|
|
|
define <8 x i16> @swizzle_31(<8 x i16> %v) {
|
|
; CHECK-LABEL: swizzle_31:
|
|
; CHECK: # BB#0:
|
|
; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,3,2,0,4,5,6,7]
|
|
; CHECK-NEXT: retq
|
|
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 3, i32 0, i32 2, i32 1, i32 7, i32 5, i32 6, i32 4>
|
|
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 3, i32 0, i32 2, i32 1, i32 7, i32 5, i32 6, i32 4>
|
|
ret <8 x i16> %2
|
|
}
|
|
|
|
define <8 x i16> @swizzle_32(<8 x i16> %v) {
|
|
; CHECK-LABEL: swizzle_32:
|
|
; CHECK: # BB#0:
|
|
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,2,3]
|
|
; CHECK-NEXT: retq
|
|
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 1, i32 2, i32 3, i32 0, i32 7, i32 5, i32 6, i32 4>
|
|
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 1, i32 2, i32 3, i32 0, i32 7, i32 5, i32 6, i32 4>
|
|
ret <8 x i16> %2
|
|
}
|
|
|
|
define <8 x i16> @swizzle_33(<8 x i16> %v) {
|
|
; CHECK-LABEL: swizzle_33:
|
|
; CHECK: # BB#0:
|
|
; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[2,1,3,0,4,5,6,7]
|
|
; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,7,6,4]
|
|
; CHECK-NEXT: retq
|
|
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 5, i32 7, i32 2, i32 3, i32 1, i32 0>
|
|
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 5, i32 7, i32 2, i32 3, i32 1, i32 0>
|
|
ret <8 x i16> %2
|
|
}
|
|
|
|
define <8 x i16> @swizzle_34(<8 x i16> %v) {
|
|
; CHECK-LABEL: swizzle_34:
|
|
; CHECK: # BB#0:
|
|
; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,3,0,2,4,5,6,7]
|
|
; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,4,5]
|
|
; CHECK-NEXT: retq
|
|
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 4, i32 7, i32 6, i32 5, i32 1, i32 2, i32 0, i32 3>
|
|
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 4, i32 7, i32 6, i32 5, i32 1, i32 2, i32 0, i32 3>
|
|
ret <8 x i16> %2
|
|
}
|
|
|
|
define <8 x i16> @swizzle_35(<8 x i16> %v) {
|
|
; CHECK-LABEL: swizzle_35:
|
|
; CHECK: # BB#0:
|
|
; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[2,1,0,3,4,5,6,7]
|
|
; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5,7,6]
|
|
; CHECK-NEXT: retq
|
|
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 7, i32 4, i32 6, i32 5, i32 1, i32 3, i32 0, i32 2>
|
|
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 7, i32 4, i32 6, i32 5, i32 1, i32 3, i32 0, i32 2>
|
|
ret <8 x i16> %2
|
|
}
|
|
|
|
define <8 x i16> @swizzle_36(<8 x i16> %v) {
|
|
; CHECK-LABEL: swizzle_36:
|
|
; CHECK: # BB#0:
|
|
; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,3,2,1,4,5,6,7]
|
|
; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,5,7]
|
|
; CHECK-NEXT: retq
|
|
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 7, i32 5, i32 0, i32 1, i32 3, i32 2>
|
|
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 7, i32 5, i32 0, i32 1, i32 3, i32 2>
|
|
ret <8 x i16> %2
|
|
}
|
|
|
|
define <8 x i16> @swizzle_37(<8 x i16> %v) {
|
|
; CHECK-LABEL: swizzle_37:
|
|
; CHECK: # BB#0:
|
|
; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,7,6,5]
|
|
; CHECK-NEXT: retq
|
|
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 7, i32 5, i32 6, i32 4>
|
|
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 7, i32 4, i32 6, i32 5>
|
|
ret <8 x i16> %2
|
|
}
|
|
|
|
define <8 x i16> @swizzle_38(<8 x i16> %v) {
|
|
; CHECK-LABEL: swizzle_38:
|
|
; CHECK: # BB#0:
|
|
; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[2,1,0,3,4,5,6,7]
|
|
; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,6,7]
|
|
; CHECK-NEXT: retq
|
|
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 5, i32 6, i32 4, i32 7, i32 0, i32 2, i32 1, i32 3>
|
|
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 5, i32 6, i32 4, i32 7, i32 0, i32 2, i32 1, i32 3>
|
|
ret <8 x i16> %2
|
|
}
|
|
|
|
define <8 x i16> @swizzle_39(<8 x i16> %v) {
|
|
; CHECK-LABEL: swizzle_39:
|
|
; CHECK: # BB#0:
|
|
; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[2,3,1,0,4,5,6,7]
|
|
; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,4,5]
|
|
; CHECK-NEXT: retq
|
|
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 5, i32 4, i32 6, i32 7, i32 3, i32 2, i32 1, i32 0>
|
|
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 5, i32 4, i32 6, i32 7, i32 3, i32 2, i32 1, i32 0>
|
|
ret <8 x i16> %2
|
|
}
|
|
|
|
define <8 x i16> @swizzle_40(<8 x i16> %v) {
|
|
; CHECK-LABEL: swizzle_40:
|
|
; CHECK: # BB#0:
|
|
; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,1,2,0,4,5,6,7]
|
|
; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,5,7]
|
|
; CHECK-NEXT: retq
|
|
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 6, i32 4, i32 7, i32 5, i32 1, i32 0, i32 3, i32 2>
|
|
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 6, i32 4, i32 7, i32 5, i32 1, i32 0, i32 3, i32 2>
|
|
ret <8 x i16> %2
|
|
}
|
|
|
|
define <8 x i16> @swizzle_41(<8 x i16> %v) {
|
|
; CHECK-LABEL: swizzle_41:
|
|
; CHECK: # BB#0:
|
|
; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7]
|
|
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,3,2]
|
|
; CHECK-NEXT: retq
|
|
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 6, i32 7, i32 5, i32 4, i32 0, i32 1, i32 3, i32 2>
|
|
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 6, i32 7, i32 5, i32 4, i32 0, i32 1, i32 3, i32 2>
|
|
ret <8 x i16> %2
|
|
}
|
|
|
|
define <8 x i16> @swizzle_42(<8 x i16> %v) {
|
|
; CHECK-LABEL: swizzle_42:
|
|
; CHECK: # BB#0:
|
|
; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,7,6]
|
|
; CHECK-NEXT: retq
|
|
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 7, i32 6, i32 4, i32 5>
|
|
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 7, i32 6, i32 4, i32 5>
|
|
ret <8 x i16> %2
|
|
}
|