llvm-6502/test/MC/Disassembler/ARM/arm-thumb-trustzone.txt
Tim Northover 8c9e52a9fc ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.
These instructions aren't universally available, but depend on a specific
extension to the normal ARM architecture (rather than, say, v6/v7/...) so a new
feature is appropriate.

This also enables the feature by default on A-class cores which usually have
these extensions, to avoid breaking existing code and act as a sensible
default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179171 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-10 12:08:35 +00:00

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# RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -disassemble -mattr=-trustzone < %s | FileCheck %s -check-prefix=NOTZ
# RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -disassemble -mattr=trustzone < %s | FileCheck %s -check-prefix=TZ
#------------------------------------------------------------------------------
# SMC
#------------------------------------------------------------------------------
0xff 0xf7 0x00 0x80
0x0c 0xbf
0xf0 0xf7 0x00 0x80
# NOTZ-NOT: smc #15
# NOTZ-NOT: smceq #0
# TZ: smc #15
# TZ: ite eq
# TZ: smceq #0