Richard Osborne ebc64cf780 Lower add (mul a, b), c into MACCU / MACCS nodes which translate ...

directly to the maccu / maccs instructions. We handle this in
ExpandADDSUB since after type legalisation it is messy to
recognise these operations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98150 91177308-0d34-0410-b5e6-96231b3b80d8

2010-03-10 11:41:08 +00:00

..

2008-11-17-Shl64.ll

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2009-01-08-Crash.ll

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2009-01-14-Remat-Crash.ll

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2009-03-27-v2f64-param.ll

Delete useless trailing semicolons.

2010-01-05 17:55:26 +00:00

2009-07-15-store192.ll

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2010-02-25-LSR-Crash.ll

Fix XCoreTargetLowering::isLegalAddressingMode() to handle VoidTy.

2010-02-26 16:44:51 +00:00

addsub64.ll

Lower add (mul a, b), c into MACCU / MACCS nodes which translate

2010-03-10 11:41:08 +00:00

ashr.ll

convert the last 3 targets to use EmitFunctionBody() now that

2010-01-28 06:22:43 +00:00

basictest.ll

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bigstructret.ll

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bitrev.ll

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constants.ll

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cos.ll

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dg.exp

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exp2.ll

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exp.ll

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fneg.ll

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getid.ll

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globals.ll

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indirectbr.ll

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ladd_lsub_combine.ll

In cases where the carry / borrow unused converted ladd / lsub

2010-03-09 16:34:25 +00:00

load.ll

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log2.ll

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log10.ll

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log.ll

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pow.ll

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powi.ll

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private.ll

Delete useless trailing semicolons.

2010-01-05 17:55:26 +00:00

sext.ll

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sin.ll

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sqrt.ll

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store.ll

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switch_long.ll

Lower BR_JT on the XCore to a jump into a series of jump instructions.

2010-02-23 13:25:07 +00:00

switch.ll

Lower BR_JT on the XCore to a jump into a series of jump instructions.

2010-02-23 13:25:07 +00:00

tls.ll

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trap.ll

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unaligned_load.ll

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unaligned_store_combine.ll

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unaligned_store.ll

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