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276f6f9cf9
1. The ARM Darwin *r9 call instructions were pseudo-ized recently.
Modify the ARMDisassemblerCore.cpp file to accomodate the change.
2. The disassembler was unnecessarily adding 8 to the sign-extended imm24:
imm32 = SignExtend(imm24:'00', 32); // A8.6.23 BL, BLX (immediate)
// Encoding A1
It has no business doing such. Removed the offending logic.
Add test cases to arm-tests.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127707 91177308-0d34-0410-b5e6-96231b3b80d8
163 lines
2.6 KiB
Plaintext
163 lines
2.6 KiB
Plaintext
# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s
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# CHECK: b #0
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0x00 0x00 0x00 0xea
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# CHECK: bl #7732
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0x8d 0x07 0x00 0xeb
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# CHECK: bleq #-4
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0xff 0xff 0xff 0x0b
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# CHECK: bfc r8, #0, #16
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0x1f 0x80 0xcf 0xe7
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# CHECK: bfi r8, r0, #16, #1
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0x10 0x88 0xd0 0xe7
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# CHECK: mov pc, lr
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0x0e 0xf0 0xa0 0xe1
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# CHECK: cmn r0, #1
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0x01 0x00 0x70 0xe3
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# CHECK: dmb
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0x5f 0xf0 0x7f 0xf5
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# CHECK: dmb nshst
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0x56 0xf0 0x7f 0xf5
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# CHECK: dsb
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0x4f 0xf0 0x7f 0xf5
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# CHECK: dsb st
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0x4e 0xf0 0x7f 0xf5
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# CHECK: isb
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0x6f 0xf0 0x7f 0xf5
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# CHECK: ldclvc p5, cr15, [r8], #-0
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0x00 0xf5 0x78 0x7c
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# CHECK: ldr r0, [r2], #15
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0x0f 0x00 0x92 0xe4
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# CHECK: ldrh r0, [r2], #0
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0xb0 0x00 0xd2 0xe0
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# CHECK: ldrht r0, [r2], #15
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0xbf 0x00 0xf2 0xe0
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# CHECK: ldrsbtvs lr, [r2], -r9
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0xd9 0xe9 0x32 0x60
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# CHECK: lsls r0, r2, #31
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0x82 0x0f 0xb0 0xe1
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# CHECK: mcr2 p0, #0, r2, c1, c0, #7
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0xf0 0x20 0x01 0xfe
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# CHECK: movt r8, #65535
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0xff 0x8f 0x4f 0xe3
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# CHECK: mvnspl r7, #245, 2
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0xf5 0x71 0xf0 0x53
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# CHECK-NOT: orr r7, r8, r7, rrx #0
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# CHECK: orr r7, r8, r7, rrx
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0x67 0x70 0x88 0xe1
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# CHECK: pkhbt r8, r9, r10, lsl #4
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0x1a 0x82 0x89 0xe6
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# CHECK-NOT: pkhbtls pc, r11, r11, lsl #0
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# CHECK: pkhbtls pc, r11, r11
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0x1b 0xf0 0x8b 0x96
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# CHECK: pop {r0, r2, r4, r6, r8, r10}
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0x55 0x05 0xbd 0xe8
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# CHECK: push {r0, r2, r4, r6, r8, r10}
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0x55 0x05 0x2d 0xe9
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# CHECK: qsax r8, r9, r10
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0x5a 0x8f 0x29 0xe6
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# CHECK: rfedb r0!
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0x00 0x0a 0x30 0xf9
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# CHECK-NOT: rsbeq r0, r2, r0, lsl #0
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# CHECK: rsbeq r0, r2, r0
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0x00 0x00 0x62 0x00
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# CHECK-NOT: rscseq r0, r0, r1, lsl #0
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# CHECK: rscseq r0, r0, r1
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0x01 0x00 0xf0 0x00
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# CHECK: sbcs r0, pc, #1
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0x01 0x00 0xdf 0xe2
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# CHECK: sbfx r0, r1, #0, #8
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0x51 0x00 0xa7 0xe7
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# CHECK: ssat r8, #1, r10, lsl #8
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0x1a 0x84 0xa0 0xe6
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# CHECK-NOT: ssatmi r0, #17, r12, lsl #0
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# CHECK: ssatmi r0, #17, r12
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0x1c 0x00 0xb0 0x46
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# CHECK: stmdb r10!, {r4, r5, r6, r7, lr}
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0xf0 0x40 0x2a 0xe9
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# CHECK: teq r0, #31
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0x1f 0x00 0x30 0xe3
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# CHECK: ubfx r0, r0, #16, #1
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0x50 0x08 0xe0 0xe7
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# CHECK: usat r8, #0, r10, asr #32
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0x5a 0x80 0xe0 0xe6
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# CHECK: setend be
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0x00 0x02 0x01 0xf1
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# CHECK: setend le
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0x00 0x00 0x01 0xf1
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# CHECK: cpsie aif
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0xc0 0x01 0x08 0xf1
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# CHECK: cps #15
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0x0f 0x00 0x02 0xf1
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# CHECK: cpsie if, #10
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0xca 0x00 0x0a 0xf1
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# CHECK: msr cpsr_fc, r0
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0x00 0xf0 0x29 0xe1
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# CHECK: rsbs r6, r7, r8
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0x08 0x60 0x77 0xe0
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# CHECK: blxeq r5
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0x35 0xff 0x2f 0x01
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# CHECK: bx r12
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0x1c 0xff 0x2f 0xe1
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# CHECK: uqadd16mi r6, r11, r8
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0x18 0x60 0x6b 0x46
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# CHECK: str r0, [sp, #4]
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0x04 0x00 0x8d 0xe5
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# CHECK: str r1, [sp]
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0x00 0x10 0x8d 0xe5
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# CHECK: ldr r3, [pc, #144]
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0x90 0x30 0x9f 0xe5
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# CHECK: strdeq r2, r3, [r0], -r8
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0xf8 0x24 0x00 0x00
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