llvm-6502/test/MC
Rafael Espindola 50b935707f Write section and section table entries in the same order.
We had two different orders, which has no value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235004 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 13:07:47 +00:00
..
AArch64
ARM Write section and section table entries in the same order. 2015-04-15 13:07:47 +00:00
AsmParser
COFF
Disassembler [AArch64] Allow non-standard INS/DUP encodings 2015-04-14 15:07:26 +00:00
ELF Write section and section table entries in the same order. 2015-04-15 13:07:47 +00:00
Hexagon
MachO
Markup
Mips Re-enable target-specific relocation table sorting and use it for Mips 2015-04-14 13:23:34 +00:00
PowerPC Add direct moves to/from VSR and exploit them for FP/INT conversions 2015-04-11 10:40:42 +00:00
R600
Sparc
SystemZ
X86 [MC] Write padding into fragments when -mc-relax-all flag is used 2015-04-12 23:42:25 +00:00