llvm-6502/test/MC/Disassembler
Johnny Chen ec51a6225c The Thumb2 RFE instructions need to have their second halfword fully specified.
In addition, the base register is not rGPR, but GPR with th exception that:

    if n == 15 then UNPREDICTABLE

rdar://problem/9273836


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129391 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12 21:41:51 +00:00
..
ARM The Thumb2 RFE instructions need to have their second halfword fully specified. 2011-04-12 21:41:51 +00:00
MBlaze
X86 Basic sanity checks to ensure that 2- and 3-byte 2011-03-15 01:32:46 +00:00