Kevin Enderby 12ce0de462 Added support for X86 instruction prefixes so llvm-mc can assemble them. The ... Lock prefix, Repeat string operation prefixes and the Segment override prefixes. Also added versions of the move string and store string instructions without the repeat prefixes to X86InstrInfo.td. And finally marked the rep versions of move/store string records in X86InstrInfo.td as isCodeGenOnly = 1 so tblgen is happy building the disassembler files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95252 91177308-0d34-0410-b5e6-96231b3b80d8		2010-02-03 21:04:42 +00:00
..
ARM
X86	Added support for X86 instruction prefixes so llvm-mc can assemble them. The	2010-02-03 21:04:42 +00:00
assignment.s
conditional_asm.s
dg.exp
directive_abort.s
directive_align.s
directive_ascii.s
directive_comm.s
directive_darwin_section.s
directive_desc.s
directive_file.s
directive_fill.s
directive_include.s
directive_lcomm.s
directive_line.s
directive_loc.s
directive_lsym.s
directive_org.s
directive_set.s
directive_space.s
directive_subsections_via_symbols.s
directive_symbol_attrs.s
directive_values.s
directive_zerofill.s
exprs-invalid.s
exprs.s
hello.s
labels.s
variables-invalid.s
variables.s