Dan Gohman 45f91b70c4 Check in a reduced version of this testcase. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75544 91177308-0d34-0410-b5e6-96231b3b80d8

2009-07-13 23:04:44 +00:00

..

Alpha

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ARM

Remove a bogus assertion.

2009-07-10 00:23:48 +00:00

CBackend

Fix an erroneous check for isFNeg; the FNeg case is handled

2009-06-04 23:43:29 +00:00

CellSPU

Add some generic expansion logic for SMULO and UMULO. Fixes UMULO

2009-06-16 06:58:29 +00:00

CPP

Fix code emission for conditional branches.

2009-05-04 19:10:38 +00:00

Generic

remove tests for removed intrinsics.

2009-07-12 21:30:06 +00:00

IA64

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Mips

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

MSP430

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

PowerPC

Check in a reduced version of this testcase.

2009-07-13 23:04:44 +00:00

SPARC

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

Thumb

Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is feasible.

2009-07-11 07:08:13 +00:00

Thumb2

Don't put IT instruction before conditional branches.

2009-07-11 07:26:20 +00:00

X86

Two changes:

2009-07-13 22:48:46 +00:00

XCore

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00