mirror of
https://github.com/c64scene-ar/llvm-6502.git
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0416d2a70a
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5326 91177308-0d34-0410-b5e6-96231b3b80d8
138 lines
5.2 KiB
C++
138 lines
5.2 KiB
C++
//===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===//
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//
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// This pass eliminates machine instruction PHI nodes by inserting copy
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// instructions. This destroys SSA information, but is the desired input for
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// some register allocators.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/SSARegMap.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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namespace {
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struct PNE : public MachineFunctionPass {
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bool runOnMachineFunction(MachineFunction &Fn) {
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bool Changed = false;
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// Eliminate PHI instructions by inserting copies into predecessor blocks.
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//
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for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
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Changed |= EliminatePHINodes(Fn, *I);
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//std::cerr << "AFTER PHI NODE ELIM:\n";
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//Fn.dump();
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return Changed;
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addPreserved<LiveVariables>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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private:
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/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions
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/// in predecessor basic blocks.
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///
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bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB);
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};
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RegisterPass<PNE> X("phi-node-elimination",
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"Eliminate PHI nodes for register allocation");
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}
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const PassInfo *PHIEliminationID = X.getPassInfo();
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/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
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/// predecessor basic blocks.
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///
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bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
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if (MBB.empty() || MBB.front()->getOpcode() != TargetInstrInfo::PHI)
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return false; // Quick exit for normal case...
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LiveVariables *LV = getAnalysisToUpdate<LiveVariables>();
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const TargetInstrInfo &MII = MF.getTarget().getInstrInfo();
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const MRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
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while (MBB.front()->getOpcode() == TargetInstrInfo::PHI) {
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MachineInstr *MI = MBB.front();
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// Unlink the PHI node from the basic block... but don't delete the PHI yet
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MBB.erase(MBB.begin());
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assert(MI->getOperand(0).isVirtualRegister() &&
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"PHI node doesn't write virt reg?");
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unsigned DestReg = MI->getOperand(0).getAllocatedRegNum();
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// Create a new register for the incoming PHI arguments
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const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(DestReg);
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unsigned IncomingReg = MF.getSSARegMap()->createVirtualRegister(RC);
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// Insert a register to register copy in the top of the current block (by
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// after any remaining phi nodes) which copies the new incoming register
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// into the phi node destination.
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//
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MachineBasicBlock::iterator AfterPHIsIt = MBB.begin();
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if (AfterPHIsIt != MBB.end())
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while ((*AfterPHIsIt)->getOpcode() == TargetInstrInfo::PHI) ++AfterPHIsIt;
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RegInfo->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC);
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// Add information to LiveVariables to know that the incoming value is dead
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if (LV) LV->addVirtualRegisterKill(IncomingReg, *(AfterPHIsIt-1));
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// Now loop over all of the incoming arguments turning them into copies into
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// the IncomingReg register in the corresponding predecessor basic block.
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//
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for (int i = MI->getNumOperands() - 1; i >= 2; i-=2) {
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MachineOperand &opVal = MI->getOperand(i-1);
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// Get the MachineBasicBlock equivalent of the BasicBlock that is the
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// source path the phi
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MachineBasicBlock &opBlock = *MI->getOperand(i).getMachineBasicBlock();
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// Check to make sure we haven't already emitted the copy for this block.
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// This can happen because PHI nodes may have multiple entries for the
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// same basic block. It doesn't matter which entry we use though, because
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// all incoming values are guaranteed to be the same for a particular bb.
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//
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// Note that this is N^2 in the number of phi node entries, but since the
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// # of entries is tiny, this is not a problem.
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//
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bool HaveNotEmitted = true;
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for (int op = MI->getNumOperands() - 1; op != i; op -= 2)
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if (&opBlock == MI->getOperand(op).getMachineBasicBlock()) {
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HaveNotEmitted = false;
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break;
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}
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if (HaveNotEmitted) {
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MachineBasicBlock::iterator I = opBlock.end();
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if (I != opBlock.begin()) { // Handle empty blocks
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--I;
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// must backtrack over ALL the branches in the previous block
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while (MII.isTerminatorInstr((*I)->getOpcode()) &&
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I != opBlock.begin())
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--I;
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// move back to the first branch instruction so new instructions
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// are inserted right in front of it and not in front of a non-branch
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if (!MII.isTerminatorInstr((*I)->getOpcode()))
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++I;
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}
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assert(opVal.isVirtualRegister() &&
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"Machine PHI Operands must all be virtual registers!");
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RegInfo->copyRegToReg(opBlock, I, IncomingReg, opVal.getReg(), RC);
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}
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}
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// really delete the PHI instruction now!
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delete MI;
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}
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return true;
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}
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