Evan Cheng a0792de66c - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This ... allow target to correctly compute latency for cases where static scheduling itineraries isn't sufficient. e.g. variable_ops instructions such as ARM::ldm. This also allows target without scheduling itineraries to compute operand latencies. e.g. X86 can return (approximated) latencies for high latency instructions such as division. - Compute operand latencies for those defined by load multiple instructions, e.g. ldm and those used by store multiple instructions, e.g. stm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115755 91177308-0d34-0410-b5e6-96231b3b80d8		2010-10-06 06:27:31 +00:00
..
Analysis
Archive
Assembler	The pshufw instruction came about in MMX2 when SSE was introduced. Don't place	2010-10-04 20:24:01 +00:00
Bindings/Ocaml
Bitcode
BugPoint
CodeGen	- Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This	2010-10-06 06:27:31 +00:00
DebugInfo	Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case.	2010-10-01 19:00:44 +00:00
ExecutionEngine
Feature
FrontendAda
FrontendC
FrontendC++
FrontendFortran
FrontendObjC
FrontendObjC++
Integer
lib
Linker
LLVMC	Generalize tblgen's dag parsing logic to handle arbitrary expressions	2010-10-06 04:55:48 +00:00
MC	Use a relocation against the symbol if it is a PLT and the symbol is in another	2010-10-05 23:57:26 +00:00
Other
Scripts	test/COFF: Fix symbol indexes and names. Update tests to match.	2010-10-05 17:57:08 +00:00
TableGen	Generalize tblgen's dag parsing logic to handle arbitrary expressions	2010-10-06 04:55:48 +00:00
Transforms	Now that the profitable bits of EnableFullLoadPRE have been enabled by default, rip out the remainder.	2010-10-01 20:02:55 +00:00
Unit
Verifier
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
site.exp.in
TestRunner.sh