Nadav Rotem ed9b934f65 Fix 9267; Add vector zext support. ... The DAGCombiner folds the zext into complex load instructions. This patch prevents this optimization on vectors since none of the supported targets knows how to perform load+vector_zext in one instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126080 91177308-0d34-0410-b5e6-96231b3b80d8		2011-02-20 12:37:50 +00:00
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Alpha	If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.	2010-12-06 22:39:26 +00:00
ARM	PR9139: Specify ARM/Darwin triple for vector-DAGCombine.ll test.	2011-02-14 22:12:50 +00:00
Blackfin	Remove TargetInstrInfo::copyRegToReg entirely.	2010-07-11 17:01:17 +00:00
CBackend
CellSPU	fix visitShift to properly zero extend the shift amount if the provided operand	2011-02-13 09:02:52 +00:00
CPP
Generic	A fix for 9165.	2011-02-12 14:40:33 +00:00
MBlaze	fix visitShift to properly zero extend the shift amount if the provided operand	2011-02-13 09:02:52 +00:00
Mips	Disable this test for now...	2011-02-11 02:59:08 +00:00
MSP430	Enhance ComputeMaskedBits to know that aligned frameindexes	2011-02-13 22:25:43 +00:00
PowerPC	Restore the behavior of frame lowering before my refactoring.	2010-12-18 19:53:14 +00:00
PTX	ptx: add passing parameter to kernel functions	2011-02-10 12:01:24 +00:00
SPARC	Prevent IMPLICIT_DEF/KILL to become a delay filler instruction in SPARC backend.	2011-02-12 19:02:33 +00:00
SystemZ	If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.	2010-12-06 22:39:26 +00:00
Thumb	Sorry, several patches in one.	2011-01-20 08:34:58 +00:00
Thumb2	Move a test that ended up in the wrong place.	2011-02-05 04:15:50 +00:00
X86	Fix 9267; Add vector zext support.	2011-02-20 12:37:50 +00:00
XCore	Add intrinsic for setc instruction on the XCore.	2011-02-09 13:22:12 +00:00