Cameron Zwarich 4071a71112 Do some peephole optimizations to remove pointless VMOVs from Neon to integer ... registers that arise from argument shuffling with the soft float ABI. These instructions are particularly slow on Cortex A8. This fixes one half of <rdar://problem/8674845>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128759 91177308-0d34-0410-b5e6-96231b3b80d8		2011-04-02 02:40:43 +00:00
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Alpha
ARM	Do some peephole optimizations to remove pointless VMOVs from Neon to integer	2011-04-02 02:40:43 +00:00
Blackfin	Don't completely eliminate identity copies that also modify super register liveness.	2011-03-31 17:55:25 +00:00
CBackend
CellSPU	Roll r127459 back in:	2011-03-11 21:52:04 +00:00
CPP
Generic
MBlaze
Mips	Add code for analyzing FP branches. Clean up branch Analysis functions.	2011-04-01 17:39:08 +00:00
MSP430
PowerPC	Fix mistyped CHECK lines.	2011-03-09 22:07:31 +00:00
PTX	ptx: add analyze/insert/remove branch	2011-03-22 14:12:00 +00:00
SPARC	Fix Mips, Sparc, and XCore tests that were dependent on register allocation.	2011-03-31 18:42:43 +00:00
SystemZ	Fix SystemZ tests	2011-03-31 23:02:12 +00:00
Thumb	Fix Thumb and Thumb2 tests to be register allocator independent.	2011-03-31 23:31:50 +00:00
Thumb2	Fix Thumb and Thumb2 tests to be register allocator independent.	2011-03-31 23:31:50 +00:00
X86	Mark all uses as <undef> when joining a copy.	2011-03-31 17:23:25 +00:00
XCore	Fix Mips, Sparc, and XCore tests that were dependent on register allocation.	2011-03-31 18:42:43 +00:00