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https://github.com/c64scene-ar/llvm-6502.git
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4aa8bdaa46
There is no advantage in being different and using the same names simplifies clang a bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189141 91177308-0d34-0410-b5e6-96231b3b80d8
127 lines
3.6 KiB
LLVM
127 lines
3.6 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse2 | FileCheck %s -check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse4.1 | FileCheck %s -check-prefix=SSE41
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx | FileCheck %s -check-prefix=AVX
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define <16 x i8> @v16i8_icmp_uge(<16 x i8> %a, <16 x i8> %b) nounwind readnone ssp uwtable {
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%1 = icmp uge <16 x i8> %a, %b
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%2 = sext <16 x i1> %1 to <16 x i8>
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ret <16 x i8> %2
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; SSE2-LABEL: v16i8_icmp_uge:
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; SSE2: pmaxub %xmm0, %xmm1
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; SSE2: pcmpeqb %xmm1, %xmm0
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; SSE41-LABEL: v16i8_icmp_uge:
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; SSE41: pmaxub %xmm0, %xmm1
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; SSE41: pcmpeqb %xmm1, %xmm0
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; AVX-LABEL: v16i8_icmp_uge:
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; AVX: vpmaxub %xmm1, %xmm0, %xmm1
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; AVX: vpcmpeqb %xmm1, %xmm0, %xmm0
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}
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define <16 x i8> @v16i8_icmp_ule(<16 x i8> %a, <16 x i8> %b) nounwind readnone ssp uwtable {
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%1 = icmp ule <16 x i8> %a, %b
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%2 = sext <16 x i1> %1 to <16 x i8>
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ret <16 x i8> %2
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; SSE2-LABEL: v16i8_icmp_ule:
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; SSE2: pminub %xmm0, %xmm1
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; SSE2: pcmpeqb %xmm1, %xmm0
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; SSE41-LABEL: v16i8_icmp_ule:
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; SSE41: pminub %xmm0, %xmm1
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; SSE41: pcmpeqb %xmm1, %xmm0
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; AVX-LABEL: v16i8_icmp_ule:
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; AVX: vpminub %xmm1, %xmm0, %xmm1
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; AVX: vpcmpeqb %xmm1, %xmm0, %xmm0
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}
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define <8 x i16> @v8i16_icmp_uge(<8 x i16> %a, <8 x i16> %b) nounwind readnone ssp uwtable {
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%1 = icmp uge <8 x i16> %a, %b
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%2 = sext <8 x i1> %1 to <8 x i16>
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ret <8 x i16> %2
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; SSE2-LABEL: v8i16_icmp_uge:
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; SSE2: movdqa {{.*}}(%rip), %xmm2
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; SEE2: pxor %xmm2, %xmm0
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; SSE2: pxor %xmm1, %xmm2
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; SSE2: pcmpgtw %xmm0, %xmm2
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; SSE2: pcmpeqd %xmm0, %xmm0
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; SSE2: pxor %xmm2, %xmm0
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; SSE41-LABEL: v8i16_icmp_uge:
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; SSE41: pmaxuw %xmm0, %xmm1
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; SSE41: pcmpeqw %xmm1, %xmm0
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; AVX-LABEL: v8i16_icmp_uge:
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; AVX: vpmaxuw %xmm1, %xmm0, %xmm1
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; AVX: vpcmpeqw %xmm1, %xmm0, %xmm0
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}
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define <8 x i16> @v8i16_icmp_ule(<8 x i16> %a, <8 x i16> %b) nounwind readnone ssp uwtable {
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%1 = icmp ule <8 x i16> %a, %b
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%2 = sext <8 x i1> %1 to <8 x i16>
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ret <8 x i16> %2
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; SSE2-LABEL: v8i16_icmp_ule:
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; SSE2: movdqa {{.*}}(%rip), %xmm2
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; SSE2: pxor %xmm2, %xmm1
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; SSE2: pxor %xmm2, %xmm0
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; SSE2: pcmpgtw %xmm1, %xmm0
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; SSE2: pcmpeqd %xmm1, %xmm1
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; SSE2: pxor %xmm0, %xmm1
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; SSE2: movdqa %xmm1, %xmm0
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; SSE41-LABEL: v8i16_icmp_ule:
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; SSE41: pminuw %xmm0, %xmm1
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; SSE41: pcmpeqw %xmm1, %xmm0
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; AVX-LABEL: v8i16_icmp_ule:
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; AVX: vpminuw %xmm1, %xmm0, %xmm1
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; AVX: vpcmpeqw %xmm1, %xmm0, %xmm0
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}
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define <4 x i32> @v4i32_icmp_uge(<4 x i32> %a, <4 x i32> %b) nounwind readnone ssp uwtable {
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%1 = icmp uge <4 x i32> %a, %b
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%2 = sext <4 x i1> %1 to <4 x i32>
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ret <4 x i32> %2
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; SSE2-LABEL: v4i32_icmp_uge:
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; SSE2: movdqa {{.*}}(%rip), %xmm2
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; SSE2: pxor %xmm2, %xmm0
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; SSE2: pxor %xmm1, %xmm2
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; SSE2: pcmpgtd %xmm0, %xmm2
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; SSE2: pcmpeqd %xmm0, %xmm0
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; SSE2: pxor %xmm2, %xmm0
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; SSE41-LABEL: v4i32_icmp_uge:
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; SSE41: pmaxud %xmm0, %xmm1
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; SSE41: pcmpeqd %xmm1, %xmm0
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; AVX-LABEL: v4i32_icmp_uge:
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; AVX: vpmaxud %xmm1, %xmm0, %xmm1
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; AVX: vpcmpeqd %xmm1, %xmm0, %xmm0
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}
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define <4 x i32> @v4i32_icmp_ule(<4 x i32> %a, <4 x i32> %b) nounwind readnone ssp uwtable {
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%1 = icmp ule <4 x i32> %a, %b
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%2 = sext <4 x i1> %1 to <4 x i32>
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ret <4 x i32> %2
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; SSE2-LABEL: v4i32_icmp_ule:
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; SSE2: movdqa {{.*}}(%rip), %xmm2
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; SSE2: pxor %xmm2, %xmm1
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; SSE2: pxor %xmm2, %xmm0
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; SSE2: pcmpgtd %xmm1, %xmm0
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; SSE2: pcmpeqd %xmm1, %xmm1
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; SSE2: pxor %xmm0, %xmm1
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; SSE2: movdqa %xmm1, %xmm0
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; SSE41-LABEL: v4i32_icmp_ule:
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; SSE41: pminud %xmm0, %xmm1
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; SSE41: pcmpeqd %xmm1, %xmm0
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; AVX-LABEL: v4i32_icmp_ule:
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; AVX: pminud %xmm1, %xmm0, %xmm1
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; AVX: pcmpeqd %xmm1, %xmm0, %xmm0
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}
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