Robert Khasanov edf556ec1f [x86] Simplify vector selection if condition value type matches vselect value type and true value is all ones or false value is all zeros. ... This transformation worked if selector is produced by SETCC, however SETCC is needed only if we consider to swap operands. So I replaced SETCC check for this case. Added tests for vselect of <X x i1> values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220777 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-28 15:59:40 +00:00
..
Analysis	Reformat partially, where I touched for whitespace changes.	2014-10-28 11:54:52 +00:00
AsmParser	X86: Implement the vectorcall calling convention	2014-10-28 01:29:26 +00:00
Bitcode	Modernize the error handling of the Materialize function.	2014-10-24 22:50:48 +00:00
CodeGen	Minimize the scope of some variables, NFC.	2014-10-28 02:57:26 +00:00
DebugInfo
ExecutionEngine
IR	Silencing an "enumeral and non-enumeral type in conditional expression" warning; NFC.	2014-10-28 13:12:13 +00:00
IRReader
LineEditor
Linker	Remove the PreserveSource linker mode.	2014-10-28 00:24:16 +00:00
LTO	Add an option to the LTO code generator to disable vectorization during LTO	2014-10-26 21:50:58 +00:00
MC
Object	Fix unicode chars into ascii in comment lines.	2014-10-27 08:08:18 +00:00
Option
ProfileData
Support	Fix bug where sys::Wait could wait on wrong pid.	2014-10-27 20:30:04 +00:00
TableGen
Target	[x86] Simplify vector selection if condition value type matches vselect value type and true value is all ones or false value is all zeros.	2014-10-28 15:59:40 +00:00
Transforms	Reformat partially, where I touched for whitespace changes.	2014-10-28 11:54:52 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile