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Hal Finkel edfeeb6d70 [PowerPC] Improve instruction selection bit-permuting operations (32-bit)
The PowerPC backend, somewhat embarrassingly, did not generate an
optimal-length sequence of instructions for a 32-bit bswap. While adding a
pattern for the bswap intrinsic to fix this would not have been terribly
difficult, doing so would not have addressed the real problem: we had been
generating poor code for many bit-permuting operations (by which I mean things
like byte-swap that permute the bits of one or more inputs around in various
ways). Here are some initial steps toward solving this deficiency.

Bit-permuting operations are represented, at the SDAG level, using ISD::ROTL,
SHL, SRL, AND and OR (mostly with constant second operands). Looking back
through these operations, we can build up a description of the bits in the
resulting value in terms of bits of one or more input values (and constant
zeros). For each bit, we compute the rotation amount from the original value,
and then group consecutive (value, rotation factor) bits into groups. Groups
sharing these attributes are then collected and sorted, and we can then
instruction select the entire permutation using a combination of masked
rotations (rlwinm), imm ands (andi/andis), and masked rotation inserts
(rlwimi).

The result is that instead of lowering an i32 bswap as:

	rlwinm 5, 3, 24, 16, 23
	rlwinm 4, 3, 24, 0, 7
	rlwimi 4, 3, 8, 8, 15
	rlwimi 5, 3, 8, 24, 31
	rlwimi 4, 5, 0, 16, 31

we now produce:

	rlwinm 4, 3, 8, 0, 31
	rlwimi 4, 3, 24, 16, 23
	rlwimi 4, 3, 24, 0, 7

and for the 'test6' example in the PowerPC/README.txt file:

 unsigned test6(unsigned x) {
   return ((x & 0x00FF0000) >> 16) | ((x & 0x000000FF) << 16);
 }

we used to produce:

	lis 4, 255
	rlwinm 3, 3, 16, 0, 31
	ori 4, 4, 255
	and 3, 3, 4

and now we produce:

	rlwinm 4, 3, 16, 24, 31
	rlwimi 4, 3, 16, 8, 15

and, as a nice bonus, this fixes the FIXME in
test/CodeGen/PowerPC/rlwimi-and.ll.

This commit does not include instruction-selection for i64 operations, those
will come later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224318 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-16 05:51:41 +00:00
autoconf Require python 2.7. 2014-12-12 15:29:31 +00:00
bindings Go bindings: introduce Value.ConstantAsMetadata. 2014-12-13 02:25:57 +00:00
cmake Disable --icf=safe to avoid a bug. 2014-12-12 14:28:19 +00:00
docs IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
examples Once more on the cmake build. nativecodegen->native on the dependencies. 2014-12-08 18:24:06 +00:00
include Remove the last unnecessary member variable of mapped_file_region. NFC. 2014-12-16 03:10:29 +00:00
lib [PowerPC] Improve instruction selection bit-permuting operations (32-bit) 2014-12-16 05:51:41 +00:00
projects
test [PowerPC] Improve instruction selection bit-permuting operations (32-bit) 2014-12-16 05:51:41 +00:00
tools Fix a bug in llvm-objdump’s -private-headers for 32-bit Mach-O files 2014-12-16 01:14:45 +00:00
unittests StringPool: Cleanup typos in unittest comments 2014-12-15 01:04:49 +00:00
utils Use unique_ptr to remove explicit delete. 2014-12-15 00:40:07 +00:00
.arcconfig
.clang-format
.clang-tidy
.gitignore
CMakeLists.txt Adding a new option to CMake to disable C++ atexit on llvm-shlib. 2014-12-09 18:49:55 +00:00
CODE_OWNERS.TXT Tom Stellard is now the code owner for libclc. 2014-12-12 01:11:48 +00:00
configure Require python 2.7. 2014-12-12 15:29:31 +00:00
CREDITS.TXT
LICENSE.TXT
llvm.spec.in
LLVMBuild.txt
Makefile
Makefile.common
Makefile.config.in Add a check for misbehaving -Wcomment from gcc-4.7 and add 2014-11-05 00:35:15 +00:00
Makefile.rules Add a check for misbehaving -Wcomment from gcc-4.7 and add 2014-11-05 00:35:15 +00:00
README.txt [TEST-COMMIT] As per Developer Policy, Added a blank line. 2014-12-06 00:38:39 +00:00

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