Andrew Trick c812110023 MIsched machine model: tablegen subtarget emitter improvement. ... Fix the way resources are counted. I'm taking some time to cleanup the way MachineScheduler handles in-order machine resources. Eventually we'll need more PPC/Atom test cases in tree. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176390 91177308-0d34-0410-b5e6-96231b3b80d8		2013-03-01 23:31:26 +00:00
..
AsmMatcherEmitter.cpp	Allow targets to add custom asm operand matching logic.	2013-02-06 06:00:06 +00:00
AsmWriterEmitter.cpp	This patch that sets the EmitAlias flag in td files	2013-02-05 08:32:10 +00:00
AsmWriterInst.cpp
AsmWriterInst.h
CallingConvEmitter.cpp
CMakeLists.txt
CodeEmitterGen.cpp
CodeGenDAGPatterns.cpp
CodeGenDAGPatterns.h
CodeGenInstruction.cpp
CodeGenInstruction.h
CodeGenIntrinsics.h
CodeGenMapTable.cpp	Fix for bug 15246 -- out-of-bound error in the TableGen backend, CodeGenMapTable.cpp.	2013-02-14 17:58:13 +00:00
CodeGenRegisters.cpp	[TableGen] Fix ICE on MSVC 2012 Release builds.	2013-02-26 21:29:47 +00:00
CodeGenRegisters.h
CodeGenSchedule.cpp	MachineModel: Inconsequential TableGen SubtargetEmitter fix.	2013-02-01 03:19:54 +00:00
CodeGenSchedule.h
CodeGenTarget.cpp
CodeGenTarget.h
DAGISelEmitter.cpp
DAGISelMatcher.cpp
DAGISelMatcher.h
DAGISelMatcherEmitter.cpp	Fix comments	2013-02-05 16:53:11 +00:00
DAGISelMatcherGen.cpp
DAGISelMatcherOpt.cpp
DFAPacketizerEmitter.cpp
DisassemblerEmitter.cpp	Add AArch64 as an experimental target.	2013-01-31 12:12:40 +00:00
FastISelEmitter.cpp
FixedLenDecoderEmitter.cpp
InstrInfoEmitter.cpp
IntrinsicEmitter.cpp	Use the AttributeSet instead of AttributeWithIndex.	2013-01-27 03:25:05 +00:00
LLVMBuild.txt
Makefile
OptParserEmitter.cpp
PseudoLoweringEmitter.cpp	PR14992 - Tablegen incorrectly converts ARM tLDMIA_UPD pseudo to tLDMIA	2013-02-13 19:21:47 +00:00
RegisterInfoEmitter.cpp
SequenceToOffsetTable.h
SetTheory.cpp
SetTheory.h
StringToOffsetTable.h
SubtargetEmitter.cpp	MIsched machine model: tablegen subtarget emitter improvement.	2013-03-01 23:31:26 +00:00
TableGen.cpp
TableGenBackends.h
TGValueTypes.cpp
X86DisassemblerShared.h
X86DisassemblerTables.cpp
X86DisassemblerTables.h
X86ModRMFilters.cpp
X86ModRMFilters.h
X86RecognizableInstr.cpp	Added 0x0D to 2-byte opcode extension table for prefetch* variants	2013-02-12 00:19:12 +00:00
X86RecognizableInstr.h