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https://github.com/c64scene-ar/llvm-6502.git
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af7c042af1
Fixed bug in tablegen conversion when source pseudo instruction has a different number of arguments than the destination instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175066 91177308-0d34-0410-b5e6-96231b3b80d8
29 lines
1.1 KiB
LLVM
29 lines
1.1 KiB
LLVM
;PR14492 - Tablegen incorrectly converts ARM tLDMIA_UPD pseudo to tLDMIA
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;RUN: llc -mtriple=thumbv7 < %s | FileCheck -check-prefix=EXPECTED %s
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;RUN: llc -mtriple=thumbv7 < %s | FileCheck %s
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;EXPECTED: foo:
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;CHECK: foo:
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define i32 @foo(i32* %a) nounwind optsize {
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entry:
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%0 = load i32* %a, align 4, !tbaa !0
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%arrayidx1 = getelementptr inbounds i32* %a, i32 1
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%1 = load i32* %arrayidx1, align 4, !tbaa !0
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%arrayidx2 = getelementptr inbounds i32* %a, i32 2
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%2 = load i32* %arrayidx2, align 4, !tbaa !0
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%add.ptr = getelementptr inbounds i32* %a, i32 3
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;Make sure we do not have a duplicated register in the front of the reg list
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;EXPECTED: ldm [[BASE:r[0-9]+]]!, {[[REG:r[0-9]+]], {{r[0-9]+}},
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;CHECK-NOT: ldm [[BASE:r[0-9]+]]!, {[[REG:r[0-9]+]], [[REG]],
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tail call void @bar(i32* %add.ptr) nounwind optsize
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%add = add nsw i32 %1, %0
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%add3 = add nsw i32 %add, %2
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ret i32 %add3
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}
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declare void @bar(i32*) optsize
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!0 = metadata !{metadata !"int", metadata !1}
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!1 = metadata !{metadata !"omnipotent char", metadata !2}
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!2 = metadata !{metadata !"Simple C/C++ TBAA"}
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