Daniel Sanders 6fdef5ecd7 [mips][msa] MSA loads and stores have a 10-bit offset. Account for this when lowering FrameIndex. ...

This prevents the compiler from emitting invalid ld.[bhwd]'s and st.[bhwd]'s
when the stack frame is between 512 and 32,768 bytes in size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195973 91177308-0d34-0410-b5e6-96231b3b80d8

2013-11-30 13:47:57 +00:00

..

2r_vector_scalar.ll

…

2r.ll

…

2rf_exup.ll

…

2rf_float_int.ll

…

2rf_fq.ll

…

2rf_int_float.ll

…

2rf_tq.ll

…

2rf.ll

…

3r_4r_widen.ll

…

3r_4r.ll

…

3r_splat.ll

…

3r-a.ll

…

3r-b.ll

Fix illegal DAG produced by SelectionDAG::getConstant() for v2i64 type

2013-11-15 12:56:49 +00:00

3r-c.ll

…

3r-d.ll

…

3r-i.ll

…

3r-m.ll

…

3r-p.ll

…

3r-s.ll

…

3r-v.ll

…

3rf_4rf_q.ll

…

3rf_4rf.ll

…

3rf_exdo.ll

…

3rf_float_int.ll

…

3rf_int_float.ll

…

3rf_q.ll

…

3rf.ll

…

arithmetic_float.ll

…

arithmetic.ll

…

basic_operations_float.ll

…

basic_operations.ll

[mips][msa] Merge basic_operations_little.ll into basic_operations.ll.

2013-11-15 17:24:41 +00:00

bit.ll

Fix illegal DAG produced by SelectionDAG::getConstant() for v2i64 type

2013-11-15 12:56:49 +00:00

bitcast.ll

…

bitwise.ll

…

compare_float.ll

…

compare.ll

Add support for legalizing SETNE/SETEQ by inverting the condition code and the result of the comparison.

2013-11-21 13:24:49 +00:00

elm_copy.ll

…

elm_cxcmsa.ll

…

elm_insv.ll

…

elm_move.ll

…

elm_shift_slide.ll

Fix illegal DAG produced by SelectionDAG::getConstant() for v2i64 type

2013-11-15 12:56:49 +00:00

endian.ll

…

frameindex.ll

[mips][msa] MSA loads and stores have a 10-bit offset. Account for this when lowering FrameIndex.

2013-11-30 13:47:57 +00:00

i5_ld_st.ll

…

i5-a.ll

Fix illegal DAG produced by SelectionDAG::getConstant() for v2i64 type

2013-11-15 12:56:49 +00:00

i5-b.ll

Fix illegal DAG produced by SelectionDAG::getConstant() for v2i64 type

2013-11-15 12:56:49 +00:00

i5-c.ll

Fix illegal DAG produced by SelectionDAG::getConstant() for v2i64 type

2013-11-15 12:56:49 +00:00

i5-m.ll

Fix illegal DAG produced by SelectionDAG::getConstant() for v2i64 type

2013-11-15 12:56:49 +00:00

i5-s.ll

Fix illegal DAG produced by SelectionDAG::getConstant() for v2i64 type

2013-11-15 12:56:49 +00:00

i8.ll

…

i10.ll

…

inline-asm.ll

…

llvm-stress-s449609655-simplified.ll

[mips][msa] Fix a corner case in performORCombine() when combining nodes into VSELECT.

2013-11-21 16:11:31 +00:00

llvm-stress-s525530439.ll

…

llvm-stress-s997348632.ll

…

llvm-stress-s1704963983.ll

Fix illegal DAG produced by SelectionDAG::getConstant() for v2i64 type

2013-11-15 12:56:49 +00:00

llvm-stress-s1935737938.ll

…

llvm-stress-s2090927243-simplified.ll

[mips][msa] Add test case that should have been added in r195456.

2013-11-22 15:47:18 +00:00

llvm-stress-s2501752154-simplified.ll

[mips][msa] Float vector constants cannot use ldi.[wd] directly. Bitcast from the appropriate integer vector type.

2013-11-22 11:24:50 +00:00

llvm-stress-s2704903805.ll

[mips][msa/dsp] Only do DSP combines if DSP is enabled.

2013-11-21 11:40:14 +00:00

llvm-stress-s3861334421.ll

Add support for legalizing SETNE/SETEQ by inverting the condition code and the result of the comparison.

2013-11-21 13:24:49 +00:00

llvm-stress-s3926023935.ll

Fixed tryFoldToZero() for vector types that need expansion.

2013-11-25 11:14:43 +00:00

llvm-stress-s3997499501.ll

…

llvm-stress-sz1-s742806235.ll

…

shift-dagcombine.ll

…

shuffle.ll

…

special.ll

…

spill.ll

…

vec.ll

…

vecs10.ll

…