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33ff5aeaa8
Generate code for Mips32r1 unless a Mips32r2 feature is tested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139433 91177308-0d34-0410-b5e6-96231b3b80d8
34 lines
690 B
LLVM
34 lines
690 B
LLVM
; RUN: llc -march=mips < %s | FileCheck %s
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; CHECK: clz $2, $4
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define i32 @t1(i32 %X) nounwind readnone {
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entry:
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%tmp1 = tail call i32 @llvm.ctlz.i32(i32 %X)
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ret i32 %tmp1
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}
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declare i32 @llvm.ctlz.i32(i32) nounwind readnone
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; CHECK: clz $2, $4
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define i32 @t2(i32 %X) nounwind readnone {
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entry:
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%tmp1 = tail call i32 @llvm.ctlz.i32(i32 %X)
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ret i32 %tmp1
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}
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; CHECK: clo $2, $4
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define i32 @t3(i32 %X) nounwind readnone {
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entry:
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%neg = xor i32 %X, -1
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%tmp1 = tail call i32 @llvm.ctlz.i32(i32 %neg)
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ret i32 %tmp1
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}
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; CHECK: clo $2, $4
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define i32 @t4(i32 %X) nounwind readnone {
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entry:
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%neg = xor i32 %X, -1
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%tmp1 = tail call i32 @llvm.ctlz.i32(i32 %neg)
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ret i32 %tmp1
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}
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