llvm-6502/test/CodeGen/X86/pr18054.ll
Michael Liao fd115c47a2 Fix PR18054
- Fix bug in (vsext (vzext x)) -> (vsext x) in SIGN_EXTEND_IN_REG
  lowering where we need to check whether x is a vector type (in-reg
  type) of i8, i16 or i32; otherwise, that optimization is not valid.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195779 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-26 20:31:31 +00:00

11 lines
261 B
LLVM

; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=penryn | FileCheck %s
define void @foo(<16 x i32>* %p, <16 x i1> %x) {
%ret = sext <16 x i1> %x to <16 x i32>
store <16 x i32> %ret, <16 x i32>* %p
ret void
; CHECK: foo
; CHECK-NOT: pmovsxbd
; CHECK: ret
}