Tim Northover d0e93f2440 TableGen: use correct MIOperand when printing aliases ... Previously, TableGen assumed that every aliased operand consumed precisely 1 MachineInstr slot (this was reasonable because until a couple of days ago, nothing more complicated was eligible for printing). This allows a couple more ARM64 aliases to print so we can remove the special code. On the X86 side, I've gone for explicit AT&T size specifiers as the default, so turned off a few of the aliases that would have just started printing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208880 91177308-0d34-0410-b5e6-96231b3b80d8		2014-05-15 13:36:01 +00:00
..
ARM64InstPrinter.cpp	TableGen: use correct MIOperand when printing aliases	2014-05-15 13:36:01 +00:00
ARM64InstPrinter.h	[ARM64] Add condition code operand type such that proper diagnostics can be emitted	2014-05-15 11:06:51 +00:00
CMakeLists.txt
LLVMBuild.txt	[ARM64] Move ARM64BaseInfo.{cpp,h} into a Utils/ subdirectory, a la AArch64. These files are required in the decoder, disassembler and parser, and a layering violation was imminent.	2014-04-09 14:42:27 +00:00
Makefile