Dan Gohman a606d955de Start TargetRegisterClass indices at 0 instead of 1, so that ... MachineRegisterInfo doesn't have to confusingly allocate an extra entry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106296 91177308-0d34-0410-b5e6-96231b3b80d8		2010-06-18 18:13:55 +00:00
..
Mangler.h	give Mangler access to TargetData.	2010-03-12 20:47:28 +00:00
SubtargetFeature.h	The getDefaultSubtargetFeatures method of SubtargetFeature did actually return a	2010-05-11 00:30:02 +00:00
Target.td	Reapply r105521, this time appending "LLU" to 64 bit	2010-06-08 22:51:23 +00:00
TargetAsmBackend.h	MC: Change RelaxInstruction to only take the input and output instructions.	2010-05-26 18:15:06 +00:00
TargetAsmLexer.h	Moved InstallLexer() from the X86-specific AsmLexer	2010-01-31 02:28:18 +00:00
TargetAsmParser.h	Fix various doxygen warnings.	2010-02-22 04:10:52 +00:00
TargetCallingConv.td
TargetData.h	Revert r97064. Duncan pointed out that bitcasts are defined in	2010-02-25 15:20:39 +00:00
TargetELFWriterInfo.h
TargetFrameInfo.h	Use explicit structs instead of std::pair to map callee saved regs to spill slots.	2009-09-27 17:58:47 +00:00
TargetInstrDesc.h	Start TargetRegisterClass indices at 0 instead of 1, so that	2010-06-18 18:13:55 +00:00
TargetInstrInfo.h	Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This	2010-06-17 22:43:56 +00:00
TargetInstrItineraries.h	declare a class with 'class' instead of struct to avoid tag mismatch	2010-06-12 15:46:56 +00:00
TargetIntrinsicInfo.h	Reintroduce support for overloading target intrinsics	2009-11-05 03:19:08 +00:00
TargetJITInfo.h	* Move stub allocation inside the JITEmitter, instead of exposing a	2009-11-23 23:35:19 +00:00
TargetLowering.h	Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,	2010-06-18 01:05:21 +00:00
TargetLoweringObjectFile.h	Add a new section and accessor for TLS data.	2010-05-22 00:00:58 +00:00
TargetMachine.h	MC: Add TargetMachine support for setting the value of MCRelaxAll with	2010-05-26 21:48:55 +00:00
TargetOpcodes.h	- Fix description of SUBREG_TO_REG. It's not going to generate a zext. But it	2010-06-09 18:15:36 +00:00
TargetOptions.h	Remove the -enable-sjlj-eh option, which doesn't do anything.	2010-05-02 15:36:26 +00:00
TargetRegisterInfo.h	Start TargetRegisterClass indices at 0 instead of 1, so that	2010-06-18 18:13:55 +00:00
TargetRegistry.h	Currently, createMachOStreamer() is invoked directly in llvm-mc which	2010-05-21 12:54:43 +00:00
TargetSchedule.td	Make processor FUs unique for given itinerary. This extends the limit of 32	2010-04-18 20:31:01 +00:00
TargetSelect.h	Add the rest of the build system logic for optional target disassemblers	2009-11-25 04:46:58 +00:00
TargetSelectionDAG.td	finally remove the immAllOnesV_bc/immAllZerosV_bc patterns	2010-03-28 08:43:23 +00:00
TargetSelectionDAGInfo.h	Fix a comment.	2010-05-11 18:03:41 +00:00
TargetSubtarget.h	Allow target to specify regclass for which antideps will only be broken along the critical path.	2009-11-13 19:52:48 +00:00