llvm-6502/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll
Tim Northover d0dbe02fd2 ARM & AArch64: make use of common cmpxchg idioms after expansion
The C and C++ semantics for compare_exchange require it to return a bool
indicating success. This gets mapped to LLVM IR which follows each cmpxchg with
an icmp of the value loaded against the desired value.

When lowered to ldxr/stxr loops, this extra comparison is redundant: its
results are implicit in the control-flow of the function.

This commit makes two changes: it replaces that icmp with appropriate PHI
nodes, and then makes sure earlyCSE is called after expansion to actually make
use of the opportunities revealed.

I've also added -{arm,aarch64}-enable-atomic-tidy options, so that
existing fragile tests aren't perturbed too much by the change. Many
of them either rely on undef/unreachable too pervasively to be
restored to something well-defined (particularly while making sure
they test the same obscure assert from many years ago), or depend on a
particular CFG shape, which is disrupted by SimplifyCFG.

rdar://problem/16227836

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209883 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-30 10:09:59 +00:00

30 lines
749 B
LLVM

; RUN: llc < %s -mtriple=thumbv7-none-linux-gnueabi -arm-atomic-cfg-tidy=0 | FileCheck %s
; PR4659
; PR4682
define hidden i32 @__gcov_execlp(i8* %path, i8* %arg, ...) nounwind {
entry:
; CHECK-LABEL: __gcov_execlp:
; CHECK: sub sp, #8
; CHECK: push
; CHECK: add r7, sp, #4
; CHECK: sub.w r4, r7, #4
; CHECK: mov sp, r4
; CHECK-NOT: mov sp, r7
; CHECK: add sp, #8
call void @__gcov_flush() nounwind
br i1 undef, label %bb5, label %bb
bb: ; preds = %bb, %entry
br i1 undef, label %bb5, label %bb
bb5: ; preds = %bb, %entry
%0 = alloca i8*, i32 undef, align 4 ; <i8**> [#uses=1]
%1 = call i32 @execvp(i8* %path, i8** %0) nounwind ; <i32> [#uses=1]
ret i32 %1
}
declare hidden void @__gcov_flush()
declare i32 @execvp(i8*, i8**) nounwind