mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-29 13:29:28 +00:00
349baa6039
useAA significantly improves the handling of vector code that has TBAA information attached. It also helps other cases, as shown by the testsuite changes here. The only real downside I've seen is that it interferes with MergeConsecutiveStores. The problem is that that optimization works top down, starting at the first store in the chain, and looks for cases where the chain result is only used by a single related store. These related stores don't alias, so useAA will have rewritten all the later stores to use a different chain input (typically the same one as the first store). I think the advantages outweigh the disadvantages though, so for now I've just disabled alias analysis for the unaligned-01.ll test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193521 91177308-0d34-0410-b5e6-96231b3b80d8
177 lines
5.3 KiB
LLVM
177 lines
5.3 KiB
LLVM
; Test 32-bit byteswaps from memory to registers.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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declare i32 @llvm.bswap.i32(i32 %a)
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; Check LRV with no displacement.
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define i32 @f1(i32 *%src) {
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; CHECK-LABEL: f1:
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; CHECK: lrv %r2, 0(%r2)
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; CHECK: br %r14
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%a = load i32 *%src
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%swapped = call i32 @llvm.bswap.i32(i32 %a)
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ret i32 %swapped
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}
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; Check the high end of the aligned LRV range.
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define i32 @f2(i32 *%src) {
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; CHECK-LABEL: f2:
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; CHECK: lrv %r2, 524284(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i32 *%src, i64 131071
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%a = load i32 *%ptr
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%swapped = call i32 @llvm.bswap.i32(i32 %a)
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ret i32 %swapped
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}
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; Check the next word up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i32 @f3(i32 *%src) {
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; CHECK-LABEL: f3:
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; CHECK: agfi %r2, 524288
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; CHECK: lrv %r2, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i32 *%src, i64 131072
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%a = load i32 *%ptr
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%swapped = call i32 @llvm.bswap.i32(i32 %a)
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ret i32 %swapped
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}
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; Check the high end of the negative aligned LRV range.
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define i32 @f4(i32 *%src) {
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; CHECK-LABEL: f4:
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; CHECK: lrv %r2, -4(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i32 *%src, i64 -1
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%a = load i32 *%ptr
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%swapped = call i32 @llvm.bswap.i32(i32 %a)
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ret i32 %swapped
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}
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; Check the low end of the LRV range.
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define i32 @f5(i32 *%src) {
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; CHECK-LABEL: f5:
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; CHECK: lrv %r2, -524288(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i32 *%src, i64 -131072
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%a = load i32 *%ptr
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%swapped = call i32 @llvm.bswap.i32(i32 %a)
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ret i32 %swapped
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}
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; Check the next word down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i32 @f6(i32 *%src) {
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; CHECK-LABEL: f6:
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; CHECK: agfi %r2, -524292
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; CHECK: lrv %r2, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i32 *%src, i64 -131073
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%a = load i32 *%ptr
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%swapped = call i32 @llvm.bswap.i32(i32 %a)
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ret i32 %swapped
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}
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; Check that LRV allows an index.
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define i32 @f7(i64 %src, i64 %index) {
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; CHECK-LABEL: f7:
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; CHECK: lrv %r2, 524287({{%r3,%r2|%r2,%r3}})
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; CHECK: br %r14
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%add1 = add i64 %src, %index
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%add2 = add i64 %add1, 524287
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%ptr = inttoptr i64 %add2 to i32 *
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%a = load i32 *%ptr
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%swapped = call i32 @llvm.bswap.i32(i32 %a)
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ret i32 %swapped
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}
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; Check that volatile accesses do not use LRV, which might access the
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; storage multple times.
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define i32 @f8(i32 *%src) {
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; CHECK-LABEL: f8:
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; CHECK: l [[REG:%r[0-5]]], 0(%r2)
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; CHECK: lrvr %r2, [[REG]]
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; CHECK: br %r14
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%a = load volatile i32 *%src
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%swapped = call i32 @llvm.bswap.i32(i32 %a)
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ret i32 %swapped
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}
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; Test a case where we spill the source of at least one LRVR. We want
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; to use LRV if possible.
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define void @f9(i32 *%ptr) {
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; CHECK-LABEL: f9:
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; CHECK: lrv {{%r[0-9]+}}, 16{{[04]}}(%r15)
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; CHECK: br %r14
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%val0 = load volatile i32 *%ptr
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%val1 = load volatile i32 *%ptr
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%val2 = load volatile i32 *%ptr
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%val3 = load volatile i32 *%ptr
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%val4 = load volatile i32 *%ptr
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%val5 = load volatile i32 *%ptr
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%val6 = load volatile i32 *%ptr
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%val7 = load volatile i32 *%ptr
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%val8 = load volatile i32 *%ptr
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%val9 = load volatile i32 *%ptr
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%val10 = load volatile i32 *%ptr
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%val11 = load volatile i32 *%ptr
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%val12 = load volatile i32 *%ptr
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%val13 = load volatile i32 *%ptr
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%val14 = load volatile i32 *%ptr
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%val15 = load volatile i32 *%ptr
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%swapped0 = call i32 @llvm.bswap.i32(i32 %val0)
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%swapped1 = call i32 @llvm.bswap.i32(i32 %val1)
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%swapped2 = call i32 @llvm.bswap.i32(i32 %val2)
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%swapped3 = call i32 @llvm.bswap.i32(i32 %val3)
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%swapped4 = call i32 @llvm.bswap.i32(i32 %val4)
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%swapped5 = call i32 @llvm.bswap.i32(i32 %val5)
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%swapped6 = call i32 @llvm.bswap.i32(i32 %val6)
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%swapped7 = call i32 @llvm.bswap.i32(i32 %val7)
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%swapped8 = call i32 @llvm.bswap.i32(i32 %val8)
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%swapped9 = call i32 @llvm.bswap.i32(i32 %val9)
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%swapped10 = call i32 @llvm.bswap.i32(i32 %val10)
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%swapped11 = call i32 @llvm.bswap.i32(i32 %val11)
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%swapped12 = call i32 @llvm.bswap.i32(i32 %val12)
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%swapped13 = call i32 @llvm.bswap.i32(i32 %val13)
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%swapped14 = call i32 @llvm.bswap.i32(i32 %val14)
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%swapped15 = call i32 @llvm.bswap.i32(i32 %val15)
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store volatile i32 %val0, i32 *%ptr
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store volatile i32 %val1, i32 *%ptr
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store volatile i32 %val2, i32 *%ptr
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store volatile i32 %val3, i32 *%ptr
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store volatile i32 %val4, i32 *%ptr
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store volatile i32 %val5, i32 *%ptr
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store volatile i32 %val6, i32 *%ptr
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store volatile i32 %val7, i32 *%ptr
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store volatile i32 %val8, i32 *%ptr
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store volatile i32 %val9, i32 *%ptr
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store volatile i32 %val10, i32 *%ptr
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store volatile i32 %val11, i32 *%ptr
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store volatile i32 %val12, i32 *%ptr
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store volatile i32 %val13, i32 *%ptr
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store volatile i32 %val14, i32 *%ptr
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store volatile i32 %val15, i32 *%ptr
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store volatile i32 %swapped0, i32 *%ptr
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store volatile i32 %swapped1, i32 *%ptr
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store volatile i32 %swapped2, i32 *%ptr
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store volatile i32 %swapped3, i32 *%ptr
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store volatile i32 %swapped4, i32 *%ptr
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store volatile i32 %swapped5, i32 *%ptr
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store volatile i32 %swapped6, i32 *%ptr
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store volatile i32 %swapped7, i32 *%ptr
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store volatile i32 %swapped8, i32 *%ptr
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store volatile i32 %swapped9, i32 *%ptr
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store volatile i32 %swapped10, i32 *%ptr
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store volatile i32 %swapped11, i32 *%ptr
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store volatile i32 %swapped12, i32 *%ptr
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store volatile i32 %swapped13, i32 *%ptr
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store volatile i32 %swapped14, i32 *%ptr
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store volatile i32 %swapped15, i32 *%ptr
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ret void
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}
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