mirror of
https://github.com/c64scene-ar/llvm-6502.git
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29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
80 lines
2.7 KiB
LLVM
80 lines
2.7 KiB
LLVM
; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s
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;
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; <rdar://problem/14486451>
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%struct.a = type [256 x i16]
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%struct.b = type [256 x i32]
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%struct.c = type [256 x i64]
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define i16 @load_halfword(%struct.a* %ctx, i32 %xor72) nounwind {
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; CHECK-LABEL: load_halfword:
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; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
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; CHECK: ldrh w0, [x0, [[REG]], lsl #1]
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%shr81 = lshr i32 %xor72, 9
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%conv82 = zext i32 %shr81 to i64
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%idxprom83 = and i64 %conv82, 255
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%arrayidx86 = getelementptr inbounds %struct.a* %ctx, i64 0, i64 %idxprom83
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%result = load i16* %arrayidx86, align 2
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ret i16 %result
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}
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define i32 @load_word(%struct.b* %ctx, i32 %xor72) nounwind {
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; CHECK-LABEL: load_word:
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; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
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; CHECK: ldr w0, [x0, [[REG]], lsl #2]
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%shr81 = lshr i32 %xor72, 9
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%conv82 = zext i32 %shr81 to i64
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%idxprom83 = and i64 %conv82, 255
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%arrayidx86 = getelementptr inbounds %struct.b* %ctx, i64 0, i64 %idxprom83
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%result = load i32* %arrayidx86, align 4
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ret i32 %result
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}
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define i64 @load_doubleword(%struct.c* %ctx, i32 %xor72) nounwind {
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; CHECK-LABEL: load_doubleword:
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; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
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; CHECK: ldr x0, [x0, [[REG]], lsl #3]
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%shr81 = lshr i32 %xor72, 9
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%conv82 = zext i32 %shr81 to i64
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%idxprom83 = and i64 %conv82, 255
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%arrayidx86 = getelementptr inbounds %struct.c* %ctx, i64 0, i64 %idxprom83
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%result = load i64* %arrayidx86, align 8
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ret i64 %result
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}
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define void @store_halfword(%struct.a* %ctx, i32 %xor72, i16 %val) nounwind {
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; CHECK-LABEL: store_halfword:
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; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
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; CHECK: strh w2, [x0, [[REG]], lsl #1]
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%shr81 = lshr i32 %xor72, 9
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%conv82 = zext i32 %shr81 to i64
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%idxprom83 = and i64 %conv82, 255
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%arrayidx86 = getelementptr inbounds %struct.a* %ctx, i64 0, i64 %idxprom83
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store i16 %val, i16* %arrayidx86, align 8
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ret void
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}
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define void @store_word(%struct.b* %ctx, i32 %xor72, i32 %val) nounwind {
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; CHECK-LABEL: store_word:
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; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
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; CHECK: str w2, [x0, [[REG]], lsl #2]
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%shr81 = lshr i32 %xor72, 9
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%conv82 = zext i32 %shr81 to i64
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%idxprom83 = and i64 %conv82, 255
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%arrayidx86 = getelementptr inbounds %struct.b* %ctx, i64 0, i64 %idxprom83
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store i32 %val, i32* %arrayidx86, align 8
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ret void
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}
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define void @store_doubleword(%struct.c* %ctx, i32 %xor72, i64 %val) nounwind {
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; CHECK-LABEL: store_doubleword:
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; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
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; CHECK: str x2, [x0, [[REG]], lsl #3]
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%shr81 = lshr i32 %xor72, 9
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%conv82 = zext i32 %shr81 to i64
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%idxprom83 = and i64 %conv82, 255
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%arrayidx86 = getelementptr inbounds %struct.c* %ctx, i64 0, i64 %idxprom83
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store i64 %val, i64* %arrayidx86, align 8
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ret void
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}
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