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https://github.com/c64scene-ar/llvm-6502.git
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34f533a6c3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182112 91177308-0d34-0410-b5e6-96231b3b80d8
59 lines
1.7 KiB
C++
59 lines
1.7 KiB
C++
//===-- AMDGPUMCTargetDesc.h - AMDGPU Target Descriptions -----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief Provides AMDGPU specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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//
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#ifndef AMDGPUMCTARGETDESC_H
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#define AMDGPUMCTARGETDESC_H
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#include "llvm/ADT/StringRef.h"
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namespace llvm {
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class MCAsmBackend;
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class MCCodeEmitter;
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class MCContext;
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class MCInstrInfo;
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class MCObjectWriter;
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class MCRegisterInfo;
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class MCSubtargetInfo;
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class Target;
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class raw_ostream;
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extern Target TheAMDGPUTarget;
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MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI);
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MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI,
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MCContext &Ctx);
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MCAsmBackend *createAMDGPUAsmBackend(const Target &T, StringRef TT,
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StringRef CPU);
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MCObjectWriter *createAMDGPUELFObjectWriter(raw_ostream &OS);
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} // End llvm namespace
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#define GET_REGINFO_ENUM
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#include "AMDGPUGenRegisterInfo.inc"
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#define GET_INSTRINFO_ENUM
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#include "AMDGPUGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_ENUM
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#include "AMDGPUGenSubtargetInfo.inc"
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#endif // AMDGPUMCTARGETDESC_H
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