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https://github.com/c64scene-ar/llvm-6502.git
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5e2b05a71e
legalization even when the IR-level optimizer has removed dead phis, such as when the high half of an i64 value is unused on a 32-bit target. I had to adjust a few test cases that had dead phis. This is a partial fix for Radar 7627077. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95816 91177308-0d34-0410-b5e6-96231b3b80d8
66 lines
3.0 KiB
LLVM
66 lines
3.0 KiB
LLVM
; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 -stats -info-output-file - | grep "Number of re-materialization"
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define arm_apcscc i32 @main(i32 %argc, i8** nocapture %argv, double %d1, double %d2) nounwind {
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entry:
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br i1 undef, label %smvp.exit, label %bb.i3
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bb.i3: ; preds = %bb.i3, %bb134
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br i1 undef, label %smvp.exit, label %bb.i3
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smvp.exit: ; preds = %bb.i3
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%0 = fmul double %d1, 2.400000e-03 ; <double> [#uses=2]
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br i1 undef, label %bb138.preheader, label %bb159
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bb138.preheader: ; preds = %smvp.exit
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br label %bb138
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bb138: ; preds = %bb138, %bb138.preheader
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br i1 undef, label %bb138, label %bb145.loopexit
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bb142: ; preds = %bb.nph218.bb.nph218.split_crit_edge, %phi0.exit
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%1 = fmul double %d1, -1.200000e-03 ; <double> [#uses=1]
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%2 = fadd double %d2, %1 ; <double> [#uses=1]
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%3 = fmul double %2, %d2 ; <double> [#uses=1]
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%4 = fsub double 0.000000e+00, %3 ; <double> [#uses=1]
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br i1 %14, label %phi1.exit, label %bb.i35
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bb.i35: ; preds = %bb142
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%5 = call arm_apcscc double @sin(double %15) nounwind readonly ; <double> [#uses=1]
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%6 = fmul double %5, 0x4031740AFA84AD8A ; <double> [#uses=1]
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%7 = fsub double 1.000000e+00, undef ; <double> [#uses=1]
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%8 = fdiv double %7, 6.000000e-01 ; <double> [#uses=1]
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br label %phi1.exit
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phi1.exit: ; preds = %bb.i35, %bb142
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%.pn = phi double [ %6, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=1]
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%9 = phi double [ %8, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=1]
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%10 = fmul double %.pn, %9 ; <double> [#uses=1]
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br i1 %14, label %phi0.exit, label %bb.i
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bb.i: ; preds = %phi1.exit
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unreachable
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phi0.exit: ; preds = %phi1.exit
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%11 = fsub double %4, %10 ; <double> [#uses=1]
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%12 = fadd double 0.000000e+00, %11 ; <double> [#uses=1]
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store double %12, double* undef, align 4
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br label %bb142
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bb145.loopexit: ; preds = %bb138
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br i1 undef, label %bb.nph218.bb.nph218.split_crit_edge, label %bb159
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bb.nph218.bb.nph218.split_crit_edge: ; preds = %bb145.loopexit
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%13 = fmul double %0, 0x401921FB54442D18 ; <double> [#uses=1]
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%14 = fcmp ugt double %0, 6.000000e-01 ; <i1> [#uses=2]
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%15 = fdiv double %13, 6.000000e-01 ; <double> [#uses=1]
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br label %bb142
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bb159: ; preds = %bb145.loopexit, %smvp.exit, %bb134
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unreachable
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bb166: ; preds = %bb127
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unreachable
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}
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declare arm_apcscc double @sin(double) nounwind readonly
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