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fddb7667ca
When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.
This works well because TableGen resolves member references late:
class I : Instruction {
AddrMode AM = AddrModeNone;
let TSFlags{3-0} = AM.Value;
}
let AM = AddrMode4 in
def ADD : I;
TSFlags gets the expected bits from AddrMode4 in this example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100384 91177308-0d34-0410-b5e6-96231b3b80d8
212 lines
7.1 KiB
TableGen
212 lines
7.1 KiB
TableGen
//===- MSP430InstrFormats.td - MSP430 Instruction Formats-----*- tblgen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Describe MSP430 instructions format here
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//
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// Format specifies the encoding used by the instruction. This is part of the
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// ad-hoc solution used to emit machine instruction encodings by our machine
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// code emitter.
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class Format<bits<2> val> {
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bits<2> Value = val;
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}
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def PseudoFrm : Format<0>;
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def SingleOpFrm : Format<1>;
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def DoubleOpFrm : Format<2>;
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def CondJumpFrm : Format<3>;
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class SourceMode<bits<2> val> {
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bits<2> Value = val;
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}
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def SrcReg : SourceMode<0>;
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def SrcMem : SourceMode<1>;
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def SrcIndReg : SourceMode<2>;
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def SrcPostInc : SourceMode<3>;
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def SrcImm : SourceMode<3>;
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class DestMode<bit val> {
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bit Value = val;
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}
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def DstReg : DestMode<0>;
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def DstMem : DestMode<1>;
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class SizeVal<bits<3> val> {
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bits<3> Value = val;
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}
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def SizeUnknown : SizeVal<0>; // Unknown / unset size
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def SizeSpecial : SizeVal<1>; // Special instruction, e.g. pseudo
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def Size2Bytes : SizeVal<2>;
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def Size4Bytes : SizeVal<3>;
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def Size6Bytes : SizeVal<4>;
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// Generic MSP430 Format
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class MSP430Inst<dag outs, dag ins, SizeVal sz, Format f,
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string asmstr> : Instruction {
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field bits<16> Inst;
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let Namespace = "MSP430";
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dag OutOperandList = outs;
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dag InOperandList = ins;
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Format Form = f;
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SizeVal Sz = sz;
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// Define how we want to layout our TargetSpecific information field... This
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// should be kept up-to-date with the fields in the MSP430InstrInfo.h file.
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let TSFlags{1-0} = Form.Value;
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let TSFlags{4-2} = Sz.Value;
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let AsmString = asmstr;
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}
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// FIXME: Create different classes for different addressing modes.
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// MSP430 Double Operand (Format I) Instructions
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class IForm<bits<4> opcode, DestMode dest, bit bw, SourceMode src, SizeVal sz,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: MSP430Inst<outs, ins, sz, DoubleOpFrm, asmstr> {
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let Pattern = pattern;
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DestMode ad = dest;
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SourceMode as = src;
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let Inst{12-15} = opcode;
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let Inst{7} = ad.Value;
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let Inst{6} = bw;
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let Inst{4-5} = as.Value;
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}
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// 8 bit IForm instructions
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class IForm8<bits<4> opcode, DestMode dest, SourceMode src, SizeVal sz,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IForm<opcode, dest, 1, src, sz, outs, ins, asmstr, pattern>;
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class I8rr<bits<4> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IForm8<opcode, DstReg, SrcReg, Size2Bytes, outs, ins, asmstr, pattern>;
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class I8ri<bits<4> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IForm8<opcode, DstReg, SrcImm, Size4Bytes, outs, ins, asmstr, pattern>;
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class I8rm<bits<4> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IForm8<opcode, DstReg, SrcMem, Size4Bytes, outs, ins, asmstr, pattern>;
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class I8mr<bits<4> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IForm8<opcode, DstMem, SrcReg, Size4Bytes, outs, ins, asmstr, pattern>;
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class I8mi<bits<4> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IForm8<opcode, DstMem, SrcImm, Size6Bytes, outs, ins, asmstr, pattern>;
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class I8mm<bits<4> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IForm8<opcode, DstMem, SrcMem, Size6Bytes, outs, ins, asmstr, pattern>;
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// 16 bit IForm instructions
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class IForm16<bits<4> opcode, DestMode dest, SourceMode src, SizeVal sz,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IForm<opcode, dest, 0, src, sz, outs, ins, asmstr, pattern>;
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class I16rr<bits<4> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IForm16<opcode, DstReg, SrcReg, Size2Bytes, outs, ins, asmstr, pattern>;
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class I16ri<bits<4> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IForm16<opcode, DstReg, SrcImm, Size4Bytes, outs, ins, asmstr, pattern>;
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class I16rm<bits<4> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IForm16<opcode, DstReg, SrcMem, Size4Bytes, outs, ins, asmstr, pattern>;
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class I16mr<bits<4> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IForm16<opcode, DstMem, SrcReg, Size4Bytes, outs, ins, asmstr, pattern>;
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class I16mi<bits<4> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IForm16<opcode, DstMem, SrcImm, Size6Bytes, outs, ins, asmstr, pattern>;
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class I16mm<bits<4> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IForm16<opcode, DstMem, SrcMem, Size6Bytes, outs, ins, asmstr, pattern>;
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// MSP430 Single Operand (Format II) Instructions
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class IIForm<bits<9> opcode, bit bw, SourceMode src, SizeVal sz,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: MSP430Inst<outs, ins, sz, SingleOpFrm, asmstr> {
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let Pattern = pattern;
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SourceMode as = src;
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let Inst{7-15} = opcode;
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let Inst{6} = bw;
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let Inst{4-5} = as.Value;
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}
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// 8 bit IIForm instructions
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class IIForm8<bits<9> opcode, SourceMode src, SizeVal sz,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IIForm<opcode, 1, src, sz, outs, ins, asmstr, pattern>;
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class II8r<bits<9> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IIForm8<opcode, SrcReg, Size2Bytes, outs, ins, asmstr, pattern>;
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class II8m<bits<9> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IIForm8<opcode, SrcMem, Size4Bytes, outs, ins, asmstr, pattern>;
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class II8i<bits<9> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IIForm8<opcode, SrcImm, Size4Bytes, outs, ins, asmstr, pattern>;
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// 16 bit IIForm instructions
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class IIForm16<bits<9> opcode, SourceMode src, SizeVal sz,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IIForm<opcode, 0, src, sz, outs, ins, asmstr, pattern>;
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class II16r<bits<9> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IIForm16<opcode, SrcReg, Size2Bytes, outs, ins, asmstr, pattern>;
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class II16m<bits<9> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IIForm16<opcode, SrcMem, Size4Bytes, outs, ins, asmstr, pattern>;
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class II16i<bits<9> opcode,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: IIForm16<opcode, SrcImm, Size4Bytes, outs, ins, asmstr, pattern>;
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// MSP430 Conditional Jumps Instructions
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class CJForm<bits<3> opcode, bits<3> cond,
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dag outs, dag ins, string asmstr, list<dag> pattern>
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: MSP430Inst<outs, ins, Size2Bytes, CondJumpFrm, asmstr> {
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let Pattern = pattern;
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let Inst{13-15} = opcode;
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let Inst{10-12} = cond;
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}
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// Pseudo instructions
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class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
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: MSP430Inst<outs, ins, SizeSpecial, PseudoFrm, asmstr> {
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let Pattern = pattern;
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let Inst{15-0} = 0;
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}
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