mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-01 00:11:00 +00:00
40f9d11ccc
LLVM generates illegal `rbit r0, #352` instruction for rbit intrinsic. According to ARM ARM, rbit only takes register as argument, not immediate. The correct instruction should be rbit <Rd>, <Rm>. The bug was originally introduced in r211057. Differential Revision: http://reviews.llvm.org/D4980 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216064 91177308-0d34-0410-b5e6-96231b3b80d8
21 lines
441 B
LLVM
21 lines
441 B
LLVM
; RUN: llc -mtriple=aarch64-eabi %s -o - | FileCheck %s
|
|
|
|
; CHECK-LABEL: rbit32
|
|
; CHECK: rbit w0, w0
|
|
define i32 @rbit32(i32 %t) {
|
|
entry:
|
|
%rbit.i = call i32 @llvm.aarch64.rbit.i32(i32 %t)
|
|
ret i32 %rbit.i
|
|
}
|
|
|
|
; CHECK-LABEL: rbit64
|
|
; CHECK: rbit x0, x0
|
|
define i64 @rbit64(i64 %t) {
|
|
entry:
|
|
%rbit.i = call i64 @llvm.aarch64.rbit.i64(i64 %t)
|
|
ret i64 %rbit.i
|
|
}
|
|
|
|
declare i64 @llvm.aarch64.rbit.i64(i64)
|
|
declare i32 @llvm.aarch64.rbit.i32(i32)
|