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61396aebee
Most of these tests require a single mov instruction that can come either before or after a 2-addr instruction. -join-physregs changes the behavior, but the results are equivalent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130891 91177308-0d34-0410-b5e6-96231b3b80d8
44 lines
1.2 KiB
LLVM
44 lines
1.2 KiB
LLVM
; RUN: llc < %s -march=x86 -mattr=+sse,-sse2 -mtriple=i386-apple-darwin | FileCheck %s -check-prefix=sse
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; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin | FileCheck %s -check-prefix=sse2
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; sse: t1:
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; sse2: t1:
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define <4 x float> @t1(<4 x float> %a, <4 x float> %b) nounwind {
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; sse: shufps
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; sse2: pshufd
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; sse2-NEXT: ret
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%tmp1 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> zeroinitializer
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ret <4 x float> %tmp1
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}
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; sse: t2:
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; sse2: t2:
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define <4 x float> @t2(<4 x float> %A, <4 x float> %B) nounwind {
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; sse: shufps
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; sse2: pshufd
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; sse2-NEXT: ret
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%tmp = shufflevector <4 x float> %A, <4 x float> %B, <4 x i32> < i32 3, i32 3, i32 3, i32 3 >
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ret <4 x float> %tmp
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}
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; sse: t3:
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; sse2: t3:
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define <4 x float> @t3(<4 x float> %A, <4 x float> %B) nounwind {
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; sse: shufps
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; sse2: pshufd
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; sse2-NEXT: ret
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%tmp = shufflevector <4 x float> %A, <4 x float> %B, <4 x i32> < i32 4, i32 4, i32 4, i32 4 >
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ret <4 x float> %tmp
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}
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; sse: t4:
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; sse2: t4:
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define <4 x float> @t4(<4 x float> %A, <4 x float> %B) nounwind {
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; sse: shufps
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; sse2: pshufd
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; sse2-NEXT: ret
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%tmp = shufflevector <4 x float> %A, <4 x float> %B, <4 x i32> < i32 1, i32 3, i32 2, i32 0 >
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ret <4 x float> %tmp
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}
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