llvm-6502/test/CodeGen/X86/vec_ins_extract-1.ll
Chris Lattner e772842505 make these tests pass when run on a G5.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65117 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-20 07:10:11 +00:00

26 lines
901 B
LLVM

; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | grep {(%esp,%eax,4)} | count 4
; Inserts and extracts with variable indices must be lowered
; to memory accesses.
define i32 @t0(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
%t13 = insertelement <4 x i32> %t8, i32 76, i32 %t7
%t9 = extractelement <4 x i32> %t13, i32 0
ret i32 %t9
}
define i32 @t1(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
%t13 = insertelement <4 x i32> %t8, i32 76, i32 0
%t9 = extractelement <4 x i32> %t13, i32 %t7
ret i32 %t9
}
define <4 x i32> @t2(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
%t9 = extractelement <4 x i32> %t8, i32 %t7
%t13 = insertelement <4 x i32> %t8, i32 %t9, i32 0
ret <4 x i32> %t13
}
define <4 x i32> @t3(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
%t9 = extractelement <4 x i32> %t8, i32 0
%t13 = insertelement <4 x i32> %t8, i32 %t9, i32 %t7
ret <4 x i32> %t13
}