mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-06 21:05:51 +00:00
b503b49b51
This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8
113 lines
2.6 KiB
LLVM
113 lines
2.6 KiB
LLVM
; Test 64-bit atomic subtractions.
|
|
;
|
|
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
|
|
|
|
; Check subtraction of a variable.
|
|
define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
|
|
; CHECK: f1:
|
|
; CHECK: lg %r2, 0(%r3)
|
|
; CHECK: [[LABEL:\.[^:]*]]:
|
|
; CHECK: lgr %r0, %r2
|
|
; CHECK: sgr %r0, %r4
|
|
; CHECK: csg %r2, %r0, 0(%r3)
|
|
; CHECK: j{{g?}}lh [[LABEL]]
|
|
; CHECK: br %r14
|
|
%res = atomicrmw sub i64 *%src, i64 %b seq_cst
|
|
ret i64 %res
|
|
}
|
|
|
|
; Check subtraction of 1, which can use AGHI.
|
|
define i64 @f2(i64 %dummy, i64 *%src) {
|
|
; CHECK: f2:
|
|
; CHECK: lg %r2, 0(%r3)
|
|
; CHECK: [[LABEL:\.[^:]*]]:
|
|
; CHECK: lgr %r0, %r2
|
|
; CHECK: aghi %r0, -1
|
|
; CHECK: csg %r2, %r0, 0(%r3)
|
|
; CHECK: j{{g?}}lh [[LABEL]]
|
|
; CHECK: br %r14
|
|
%res = atomicrmw sub i64 *%src, i64 1 seq_cst
|
|
ret i64 %res
|
|
}
|
|
|
|
; Check the low end of the AGHI range.
|
|
define i64 @f3(i64 %dummy, i64 *%src) {
|
|
; CHECK: f3:
|
|
; CHECK: aghi %r0, -32768
|
|
; CHECK: br %r14
|
|
%res = atomicrmw sub i64 *%src, i64 32768 seq_cst
|
|
ret i64 %res
|
|
}
|
|
|
|
; Check the next value up, which must use AGFI.
|
|
define i64 @f4(i64 %dummy, i64 *%src) {
|
|
; CHECK: f4:
|
|
; CHECK: agfi %r0, -32769
|
|
; CHECK: br %r14
|
|
%res = atomicrmw sub i64 *%src, i64 32769 seq_cst
|
|
ret i64 %res
|
|
}
|
|
|
|
; Check the low end of the AGFI range.
|
|
define i64 @f5(i64 %dummy, i64 *%src) {
|
|
; CHECK: f5:
|
|
; CHECK: agfi %r0, -2147483648
|
|
; CHECK: br %r14
|
|
%res = atomicrmw sub i64 *%src, i64 2147483648 seq_cst
|
|
ret i64 %res
|
|
}
|
|
|
|
; Check the next value up, which must use a register operation.
|
|
define i64 @f6(i64 %dummy, i64 *%src) {
|
|
; CHECK: f6:
|
|
; CHECK: sgr
|
|
; CHECK: br %r14
|
|
%res = atomicrmw sub i64 *%src, i64 2147483649 seq_cst
|
|
ret i64 %res
|
|
}
|
|
|
|
; Check subtraction of -1, which can use AGHI.
|
|
define i64 @f7(i64 %dummy, i64 *%src) {
|
|
; CHECK: f7:
|
|
; CHECK: aghi %r0, 1
|
|
; CHECK: br %r14
|
|
%res = atomicrmw sub i64 *%src, i64 -1 seq_cst
|
|
ret i64 %res
|
|
}
|
|
|
|
; Check the high end of the AGHI range.
|
|
define i64 @f8(i64 %dummy, i64 *%src) {
|
|
; CHECK: f8:
|
|
; CHECK: aghi %r0, 32767
|
|
; CHECK: br %r14
|
|
%res = atomicrmw sub i64 *%src, i64 -32767 seq_cst
|
|
ret i64 %res
|
|
}
|
|
|
|
; Check the next value down, which must use AGFI instead.
|
|
define i64 @f9(i64 %dummy, i64 *%src) {
|
|
; CHECK: f9:
|
|
; CHECK: agfi %r0, 32768
|
|
; CHECK: br %r14
|
|
%res = atomicrmw sub i64 *%src, i64 -32768 seq_cst
|
|
ret i64 %res
|
|
}
|
|
|
|
; Check the high end of the AGFI range.
|
|
define i64 @f10(i64 %dummy, i64 *%src) {
|
|
; CHECK: f10:
|
|
; CHECK: agfi %r0, 2147483647
|
|
; CHECK: br %r14
|
|
%res = atomicrmw sub i64 *%src, i64 -2147483647 seq_cst
|
|
ret i64 %res
|
|
}
|
|
|
|
; Check the next value down, which must use a register operation.
|
|
define i64 @f11(i64 %dummy, i64 *%src) {
|
|
; CHECK: f11:
|
|
; CHECK: sgr
|
|
; CHECK: br %r14
|
|
%res = atomicrmw sub i64 *%src, i64 -2147483648 seq_cst
|
|
ret i64 %res
|
|
}
|