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04bcc11905
derived classes. Since global data alignment, layout, and mangling is often based on the DataLayout, move it to the TargetMachine. This ensures that global data is going to be layed out and mangled consistently if the subtarget changes on a per function basis. Prior to this all targets(*) have had subtarget dependent code moved out and onto the TargetMachine. *One target hasn't been migrated as part of this change: R600. The R600 port has, as a subtarget feature, the size of pointers and this affects global data layout. I've currently hacked in a FIXME to enable progress, but the port needs to be updated to either pass the 64-bitness to the TargetMachine, or fix the DataLayout to avoid subtarget dependent features. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227113 91177308-0d34-0410-b5e6-96231b3b80d8
97 lines
3.1 KiB
C++
97 lines
3.1 KiB
C++
//===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the Mips specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
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#define LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
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#include "MipsSubtarget.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/SelectionDAGISel.h"
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#include "llvm/Target/TargetFrameLowering.h"
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#include "llvm/Target/TargetMachine.h"
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#include "MCTargetDesc/MipsABIInfo.h"
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namespace llvm {
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class formatted_raw_ostream;
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class MipsRegisterInfo;
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class MipsTargetMachine : public LLVMTargetMachine {
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bool isLittle;
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std::unique_ptr<TargetLoweringObjectFile> TLOF;
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// Selected ABI
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MipsABIInfo ABI;
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const DataLayout DL; // Calculates type size & alignment
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MipsSubtarget *Subtarget;
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MipsSubtarget DefaultSubtarget;
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MipsSubtarget NoMips16Subtarget;
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MipsSubtarget Mips16Subtarget;
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mutable StringMap<std::unique_ptr<MipsSubtarget>> SubtargetMap;
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public:
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MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
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const TargetOptions &Options, Reloc::Model RM,
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CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
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~MipsTargetMachine() override;
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void addAnalysisPasses(PassManagerBase &PM) override;
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const DataLayout *getDataLayout() const override { return &DL; }
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const MipsSubtarget *getSubtargetImpl() const override {
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if (Subtarget)
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return Subtarget;
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return &DefaultSubtarget;
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}
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const MipsSubtarget *getSubtargetImpl(const Function &F) const override;
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/// \brief Reset the subtarget for the Mips target.
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void resetSubtarget(MachineFunction *MF);
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// Pass Pipeline Configuration
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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TargetLoweringObjectFile *getObjFileLowering() const override {
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return TLOF.get();
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}
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bool isLittleEndian() const { return isLittle; }
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const MipsABIInfo &getABI() const { return ABI; }
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};
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/// MipsebTargetMachine - Mips32/64 big endian target machine.
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///
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class MipsebTargetMachine : public MipsTargetMachine {
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virtual void anchor();
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public:
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MipsebTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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/// MipselTargetMachine - Mips32/64 little endian target machine.
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///
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class MipselTargetMachine : public MipsTargetMachine {
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virtual void anchor();
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public:
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MipselTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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} // End llvm namespace
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#endif
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