6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-03-04 21:31:03 +00:00
Code Issues Projects Releases Wiki Activity
llvm-6502/lib/Target/R600
History
Matt Arsenault f1b6c1f287 R600/SI: Fix schedule model for v_div_scale_{f32|f64} 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229235 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 04:03:18 +00:00
..
AsmParser
…
InstPrinter
…
MCTargetDesc
R600/SI: Remove handling of fpimm
2015-02-13 19:05:07 +00:00
TargetInfo
…
AMDGPU.h
[PM] Remove a bunch of stale TTI creation method declarations. I nuked
2015-02-01 00:22:15 +00:00
AMDGPU.td
R600/SI: Add subtarget feature for if f32 fma is fast
2015-01-29 19:34:25 +00:00
AMDGPUAlwaysInlinePass.cpp
…
AMDGPUAsmPrinter.cpp
Compute the ELF SectionKind from the flags.
2015-01-29 17:33:21 +00:00
AMDGPUAsmPrinter.h
…
AMDGPUCallingConv.td
…
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUInstrInfo.cpp
Make helper functions/classes/globals static. NFC.
2015-02-06 17:51:54 +00:00
AMDGPUInstrInfo.h
R600/SI: Determine target-specific encoding of READLANE and WRITELANE early v2
2015-02-03 17:37:57 +00:00
AMDGPUInstrInfo.td
…
AMDGPUInstructions.td
MathExtras: Bring Count(Trailing|Leading)Ones and CountPopulation in line with countTrailingZeros
2015-02-12 15:35:40 +00:00
AMDGPUIntrinsicInfo.cpp
…
AMDGPUIntrinsicInfo.h
…
AMDGPUIntrinsics.td
…
AMDGPUISelDAGToDAG.cpp
R600/SI: Store immediate offsets > 12-bits in soffset
2015-02-11 00:34:35 +00:00
AMDGPUISelLowering.cpp
R600/SI: Make more store operations legal
2015-02-04 20:49:51 +00:00
AMDGPUISelLowering.h
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
AMDGPUMachineFunction.cpp
R600: Canonicalize access to function attributes, NFC
2015-02-14 02:45:45 +00:00
AMDGPUMachineFunction.h
…
AMDGPUMCInstLower.cpp
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
AMDGPUMCInstLower.h
…
AMDGPUPromoteAlloca.cpp
…
AMDGPURegisterInfo.cpp
…
AMDGPURegisterInfo.h
…
AMDGPURegisterInfo.td
…
AMDGPUSubtarget.cpp
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
AMDGPUSubtarget.h
R600/SI: Disable subreg liveness
2015-02-11 18:24:53 +00:00
AMDGPUTargetMachine.cpp
[PM] Remove the old 'PassManager.h' header file at the top level of
2015-02-13 10:01:29 +00:00
AMDGPUTargetMachine.h
R600: Split AMDGPUPassConfig into R600PassConfig and GCNPassConfig
2015-02-11 17:11:51 +00:00
AMDGPUTargetTransformInfo.cpp
R600/SI: Fix bug in TTI loop unrolling preferences
2015-02-05 15:32:18 +00:00
AMDGPUTargetTransformInfo.h
[multiversion] Remove the function parameter from the unrolling
2015-02-01 14:31:23 +00:00
AMDILCFGStructurizer.cpp
…
AMDKernelCodeT.h
…
CaymanInstructions.td
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
CIInstructions.td
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
CMakeLists.txt
…
EvergreenInstructions.td
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
LLVMBuild.txt
…
Makefile
…
Processors.td
R600/SI: Add subtarget feature for if f32 fma is fast
2015-01-29 19:34:25 +00:00
R600ClauseMergePass.cpp
…
R600ControlFlowFinalizer.cpp
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
R600Defines.h
…
R600EmitClauseMarkers.cpp
…
R600ExpandSpecialInstrs.cpp
…
R600InstrFormats.td
…
R600InstrInfo.cpp
…
R600InstrInfo.h
…
R600Instructions.td
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
R600Intrinsics.td
…
R600ISelLowering.cpp
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
R600ISelLowering.h
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
[PM] Remove the old 'PassManager.h' header file at the top level of
2015-02-13 10:01:29 +00:00
R600MachineScheduler.h
…
R600OptimizeVectorRegisters.cpp
…
R600Packetizer.cpp
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
R600RegisterInfo.cpp
…
R600RegisterInfo.h
…
R600RegisterInfo.td
…
R600Schedule.td
…
R600TextureIntrinsicsReplacer.cpp
…
R700Instructions.td
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
SIAnnotateControlFlow.cpp
R600/SI: Fix bug from insertion of llvm.SI.end.cf into loop headers
2015-02-05 15:32:15 +00:00
SIDefines.h
R600/SI: Also enable WQM for image opcodes which calculate LOD v3
2015-02-06 02:51:20 +00:00
SIFixSGPRCopies.cpp
…
SIFixSGPRLiveRanges.cpp
…
SIFoldOperands.cpp
R600/SI: Fix phys reg copies in SIFoldOperands
2015-02-14 02:55:57 +00:00
SIInsertWaits.cpp
R600/SI: Fix dependency between instruction writing M0 and S_SENDMSG on VI (v2)
2015-02-03 17:37:52 +00:00
SIInstrFormats.td
R600/SI: Rename encoding field to match docs for VOP3b
2015-02-14 03:54:29 +00:00
SIInstrInfo.cpp
R600/SI: Fix copies from SGPR to VCC
2015-02-14 02:55:56 +00:00
SIInstrInfo.h
R600/SI: Allow f64 inline immediates in i64 operands
2015-02-13 19:05:03 +00:00
SIInstrInfo.td
R600/SI: Fix not encoding src2 for v_div_scale_{f32|f64}
2015-02-14 03:40:35 +00:00
SIInstructions.td
R600/SI: Fix schedule model for v_div_scale_{f32|f64}
2015-02-14 04:03:18 +00:00
SIIntrinsics.td
…
SIISelLowering.cpp
R600/SI: Allow f64 inline immediates in i64 operands
2015-02-13 19:05:03 +00:00
SIISelLowering.h
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
SILoadStoreOptimizer.cpp
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
SILowerControlFlow.cpp
R600/SI: Don't enable WQM for V_INTERP_* instructions v2
2015-02-06 02:51:25 +00:00
SILowerI1Copies.cpp
…
SIMachineFunctionInfo.cpp
…
SIMachineFunctionInfo.h
…
SIPrepareScratchRegs.cpp
…
SIRegisterInfo.cpp
R600/SI: Determine target-specific encoding of READLANE and WRITELANE early v2
2015-02-03 17:37:57 +00:00
SIRegisterInfo.h
R600/SI: Define a schedule model and enable the generic machine scheduler
2015-01-29 16:55:25 +00:00
SIRegisterInfo.td
R600/SI: Really fix size of VReg_1
2015-02-14 03:54:32 +00:00
SISchedule.td
…
SIShrinkInstructions.cpp
R600/SI: Allow f64 inline immediates in i64 operands
2015-02-13 19:05:03 +00:00
SITypeRewriter.cpp
R600: Canonicalize access to function attributes, NFC
2015-02-14 02:45:45 +00:00
VIInstrFormats.td
R600/SI: Fix VOP3b encoding on VI
2015-02-14 03:02:23 +00:00
VIInstructions.td
…