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654d5440a4
cost modeling for if-conversion. Now if only we had a way to estimate the misprediction probability. Adjsut CodeGen/ARM/ifcvt10.ll. The pipeline on Cortex-A8 is long enough that it is still profitable to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114995 91177308-0d34-0410-b5e6-96231b3b80d8
31 lines
1.0 KiB
LLVM
31 lines
1.0 KiB
LLVM
; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a9 | FileCheck %s
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; rdar://8402126
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; Make sure if-converter is not predicating vldmia and ldmia. These are
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; micro-coded and would have long issue latency even if predicated on
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; false predicate.
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%0 = type { float, float, float, float }
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%pln = type { %vec, float }
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%vec = type { [4 x float] }
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define arm_aapcs_vfpcc float @aaa(%vec* nocapture %ustart, %vec* nocapture %udir, %vec* nocapture %vstart, %vec* nocapture %vdir, %vec* %upoint, %vec* %vpoint) {
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; CHECK: aaa:
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; CHECK: vldr.32
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; CHECK-NOT: vldrne
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; CHECK-NOT: vpopne
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; CHECK-NOT: popne
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; CHECK: vpop
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; CHECK: pop
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entry:
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br i1 undef, label %bb81, label %bb48
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bb48: ; preds = %entry
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%0 = call arm_aapcs_vfpcc %0 @bbb(%pln* undef, %vec* %vstart, %vec* undef) nounwind ; <%0> [#uses=0]
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ret float 0.000000e+00
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bb81: ; preds = %entry
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ret float 0.000000e+00
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}
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declare arm_aapcs_vfpcc %0 @bbb(%pln* nocapture, %vec* nocapture, %vec* nocapture) nounwind
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