llvm-6502/test/CodeGen
Chris Lattner 82987bfe9b fix PR4650: we only track sizes for certain objects, so only put something
into the mergable section if it is one of our special cases.  This could
obviously be improved, but this is the minimal fix and restores us to the
previous behavior.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77679 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31 16:17:13 +00:00
..
Alpha
ARM Add VFP3 D registers to the DPR register class. 2009-07-29 23:03:41 +00:00
CBackend
CellSPU
CPP
Generic
Mips Remove SectionKind::Small*. This was only used on mips, and is apparently 2009-07-24 03:11:51 +00:00
MSP430
PIC16 Test case to check that separate section is created for a global variable specified with section attribute. 2009-07-27 16:20:41 +00:00
PowerPC
SPARC
SystemZ
Thumb tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have. 2009-07-28 07:38:35 +00:00
Thumb2 When fp is not eliminated, instructions with T2_i12 modes will be changed to T2_i8 ones. Take that into consideration when determining stack size limit for reserving register scavenging slot. 2009-07-30 23:29:25 +00:00
X86 fix PR4650: we only track sizes for certain objects, so only put something 2009-07-31 16:17:13 +00:00
XCore Add tests for handling of globals and tls on the XCore. These currently fail 2009-07-24 00:38:20 +00:00