Jakob Stoklund Olesen f28987b76e Use set operations instead of plain lists to enumerate register classes.
This simplifies many of the target description files since it is common
for register classes to be related or contain sequences of numbered
registers.

I have verified that this doesn't change the files generated by TableGen
for ARM and X86. It alters the allocation order of MBlaze GPR and Mips
FGR32 registers, but I believe the change is benign.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 23:28:14 +00:00
2011-06-12 15:26:54 +00:00
2011-05-24 00:58:06 +00:00
2011-06-09 20:11:46 +00:00
2011-06-15 21:18:51 +00:00
2011-05-31 21:54:28 +00:00
2011-06-12 15:26:54 +00:00
2011-06-12 15:26:54 +00:00
2011-05-12 17:38:08 +00:00

Low Level Virtual Machine (LLVM)
================================

This directory and its subdirectories contain source code for the Low Level
Virtual Machine, a toolkit for the construction of highly optimized compilers,
optimizers, and runtime environments.

LLVM is open source software. You may freely distribute it under the terms of
the license agreement found in LICENSE.txt.

Please see the HTML documentation provided in docs/index.html for further
assistance with LLVM.

If you're writing a package for LLVM, see docs/Packaging.html for our
suggestions.

Description
LLVM backend for 6502
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