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f2a1c83c86
The encoding of NOP in ARMAsmBackend.cpp is missing a trailing zero, which causes the emission of a coprocessor instruction rather than "mov r0, r0" as indicated in the comment. The test also checks for the wrong encoding. http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20121203/157919.html git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169420 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
ARMAddressingModes.h | ||
ARMAsmBackend.cpp | ||
ARMBaseInfo.h | ||
ARMELFObjectWriter.cpp | ||
ARMFixupKinds.h | ||
ARMMachObjectWriter.cpp | ||
ARMMCAsmInfo.cpp | ||
ARMMCAsmInfo.h | ||
ARMMCCodeEmitter.cpp | ||
ARMMCExpr.cpp | ||
ARMMCExpr.h | ||
ARMMCTargetDesc.cpp | ||
ARMMCTargetDesc.h | ||
CMakeLists.txt | ||
LLVMBuild.txt | ||
Makefile |