mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-16 11:30:51 +00:00
2d0eef4c7d
This includes instructions with aggregate operands (insert/extract), instructions with vector operands (insert/extract/shuffle), binary arithmetic and bitwise instructions, conversion instructions and terminators. Work was done by lama.saba@intel.com. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202262 91177308-0d34-0410-b5e6-96231b3b80d8
48 lines
877 B
LLVM
48 lines
877 B
LLVM
; RUN: llvm-dis < %s.bc| FileCheck %s
|
|
|
|
; TerminatorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
|
|
; The test checks that LLVM does not misread terminator instructions from
|
|
; older bitcode files.
|
|
|
|
define i32 @condbr(i1 %cond){
|
|
entry:
|
|
; CHECK: br i1 %cond, label %TrueLabel, label %FalseLabel
|
|
br i1 %cond, label %TrueLabel, label %FalseLabel
|
|
|
|
TrueLabel:
|
|
ret i32 1
|
|
|
|
FalseLabel:
|
|
ret i32 0
|
|
}
|
|
|
|
define i32 @uncondbr(){
|
|
entry:
|
|
; CHECK: br label %uncondLabel
|
|
br label %uncondLabel
|
|
|
|
uncondLabel:
|
|
ret i32 1
|
|
}
|
|
|
|
define i32 @indirectbr(i8* %Addr){
|
|
entry:
|
|
; CHECK: indirectbr i8* %Addr, [label %bb1, label %bb2]
|
|
indirectbr i8* %Addr, [ label %bb1, label %bb2 ]
|
|
|
|
bb1:
|
|
ret i32 1
|
|
|
|
bb2:
|
|
ret i32 0
|
|
}
|
|
|
|
define void @unreachable(){
|
|
entry:
|
|
; CHECK: unreachable
|
|
unreachable
|
|
|
|
ret void
|
|
}
|
|
|