llvm-6502/test/CodeGen
Joel Jones c8969fd291 Test for the the problem with xors being changed into ands
when the set bits aren't the same for both args of the xor.
This transformation is in the function TargetLowering::SimplifyDemandedBits
in the file lib/CodeGen/SelectionDAG/TargetLowering.cpp.

I have tested this test using a previous version of llc which the defect and 
the a version of llc which does not. I got the expected fail and pass, 
respectively.

This test goes with rdar://11195364 and the check in with the fix: svn r154955


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155156 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 20:54:44 +00:00
..
ARM Fix bad EXTRACT_SUBREG in instruction selection for extending-loads on NEON. 2012-04-17 08:18:00 +00:00
CellSPU Flip the new block-placement pass to be on by default. 2012-04-16 13:49:17 +00:00
CPP
Generic Move to X86 directory because this fails on non-X86 platforms. 2012-04-16 16:38:48 +00:00
Hexagon Disable Hexagon test temporarily. 2012-04-12 21:06:54 +00:00
MBlaze
Mips Flip the new block-placement pass to be on by default. 2012-04-16 13:49:17 +00:00
MSP430
PowerPC Remove dead SD nodes after the combining pass. Fixes PR12201. 2012-04-16 03:33:22 +00:00
PTX
SPARC
Thumb
Thumb2 Fix updateTerminator to be resiliant to degenerate terminators where 2012-04-16 22:03:00 +00:00
X86 Test for the the problem with xors being changed into ands 2012-04-19 20:54:44 +00:00
XCore Flip the new block-placement pass to be on by default. 2012-04-16 13:49:17 +00:00