Michael J. Spencer f2c19f622f Revert "[x86] Fold extract_vector_elt of a load into the Load's address computation." ... There's a bug where this can create cycles in the DAG. It will take a bit to fix, so I'm backing it out for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213339 91177308-0d34-0410-b5e6-96231b3b80d8		2014-07-18 00:15:50 +00:00
..
AArch64	CodeGen: extend f16 conversions to permit types > float.	2014-07-17 10:51:23 +00:00
ARM	ARM: support direct f16 <-> f64 conversions	2014-07-17 11:27:04 +00:00
CPP	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
Generic
Hexagon
Inputs
Mips	[mips] For the FP64A ABI, odd-numbered double-precision moves must not use mtc1/mfc1.	2014-07-14 13:08:14 +00:00
MSP430
NVPTX	[NVPTX] Improve handling of FP fusion	2014-07-17 18:10:09 +00:00
PowerPC	[PowerPC] Fix invalid displacement created by LocalStackAlloc	2014-07-11 17:19:31 +00:00
R600	CodeGen: extend f16 conversions to permit types > float.	2014-07-17 10:51:23 +00:00
SPARC	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
SystemZ	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
Thumb	ARM: Fix fastcc calling convention for Thumb1	2014-06-13 08:33:03 +00:00
Thumb2	ARM: Fix TPsoft for Thumb mode	2014-06-24 15:45:59 +00:00
X86	Revert "[x86] Fold extract_vector_elt of a load into the Load's address computation."	2014-07-18 00:15:50 +00:00
XCore	llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.	2014-07-04 11:58:03 +00:00