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https://github.com/c64scene-ar/llvm-6502.git
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5a032de387
in MachineRelocation to create Relocations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28088 91177308-0d34-0410-b5e6-96231b3b80d8
220 lines
7.5 KiB
C++
220 lines
7.5 KiB
C++
//===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
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// JIT-compile bytecode to native PowerPC.
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//
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//===----------------------------------------------------------------------===//
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#include "PPCTargetMachine.h"
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#include "PPCRelocations.h"
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#include "PPC.h"
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#include "llvm/Module.h"
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#include "llvm/PassManager.h"
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#include "llvm/CodeGen/MachineCodeEmitter.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Target/TargetOptions.h"
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#include <iostream>
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using namespace llvm;
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namespace {
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class PPCCodeEmitter : public MachineFunctionPass {
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TargetMachine &TM;
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MachineCodeEmitter &MCE;
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// Tracks which instruction references which BasicBlock
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std::vector<std::pair<MachineBasicBlock*, unsigned*> > BBRefs;
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/// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
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///
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int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
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public:
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PPCCodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
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: TM(T), MCE(M) {}
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const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
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/// runOnMachineFunction - emits the given MachineFunction to memory
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///
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bool runOnMachineFunction(MachineFunction &MF);
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/// emitBasicBlock - emits the given MachineBasicBlock to memory
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///
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void emitBasicBlock(MachineBasicBlock &MBB);
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/// getValueBit - return the particular bit of Val
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///
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unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
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/// getBinaryCodeForInstr - This function, generated by the
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/// CodeEmitterGenerator using TableGen, produces the binary encoding for
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/// machine instructions.
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///
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unsigned getBinaryCodeForInstr(MachineInstr &MI);
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};
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}
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/// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
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/// machine code emitted. This uses a MachineCodeEmitter object to handle
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/// actually outputting the machine code and resolving things like the address
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/// of functions. This method should returns true if machine code emission is
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/// not supported.
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///
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bool PPCTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
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MachineCodeEmitter &MCE) {
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// Machine code emitter pass for PowerPC
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PM.add(new PPCCodeEmitter(*this, MCE));
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// Delete machine code for this function after emitting it
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PM.add(createMachineCodeDeleter());
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return false;
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}
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bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
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assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
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MF.getTarget().getRelocationModel() != Reloc::Static) &&
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"JIT relocation model must be set to static or default!");
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do {
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BBRefs.clear();
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MCE.startFunction(MF);
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for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
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emitBasicBlock(*BB);
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} while (MCE.finishFunction(MF));
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// Resolve branches to BasicBlocks for the entire function
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for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
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intptr_t Location = MCE.getMachineBasicBlockAddress(BBRefs[i].first);
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unsigned *Ref = BBRefs[i].second;
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DEBUG(std::cerr << "Fixup @ " << (void*)Ref << " to " << (void*)Location
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<< "\n");
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unsigned Instr = *Ref;
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intptr_t BranchTargetDisp = (Location - (intptr_t)Ref) >> 2;
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switch (Instr >> 26) {
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default: assert(0 && "Unknown branch user!");
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case 18: // This is B or BL
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*Ref |= (BranchTargetDisp & ((1 << 24)-1)) << 2;
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break;
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case 16: // This is BLT,BLE,BEQ,BGE,BGT,BNE, or other bcx instruction
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*Ref |= (BranchTargetDisp & ((1 << 14)-1)) << 2;
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break;
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}
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}
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BBRefs.clear();
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return false;
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}
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void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
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MCE.StartMachineBasicBlock(&MBB);
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for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
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MachineInstr &MI = *I;
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unsigned Opcode = MI.getOpcode();
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switch (MI.getOpcode()) {
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default:
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MCE.emitWordBE(getBinaryCodeForInstr(*I));
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break;
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case PPC::IMPLICIT_DEF_GPR:
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case PPC::IMPLICIT_DEF_F8:
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case PPC::IMPLICIT_DEF_F4:
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case PPC::IMPLICIT_DEF_VRRC:
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break; // pseudo opcode, no side effects
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case PPC::MovePCtoLR:
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assert(0 && "CodeEmitter does not support MovePCtoLR instruction");
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break;
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}
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}
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}
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int PPCCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
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intptr_t rv = 0; // Return value; defaults to 0 for unhandled cases
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// or things that get fixed up later by the JIT.
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if (MO.isRegister()) {
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rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg());
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// Special encoding for MTCRF and MFOCRF, which uses a bit mask for the
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// register, not the register number directly.
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if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
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(MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) {
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rv = 0x80 >> rv;
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}
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} else if (MO.isImmediate()) {
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rv = MO.getImmedValue();
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} else if (MO.isGlobalAddress() || MO.isExternalSymbol()) {
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unsigned Reloc = 0;
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if (MI.getOpcode() == PPC::BL)
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Reloc = PPC::reloc_pcrel_bx;
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else {
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switch (MI.getOpcode()) {
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default: MI.dump(); assert(0 && "Unknown instruction for relocation!");
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case PPC::LIS:
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Reloc = PPC::reloc_absolute_high; // Pointer to symbol
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break;
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case PPC::LI:
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case PPC::LA:
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case PPC::LBZ:
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case PPC::LHA:
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case PPC::LHZ:
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case PPC::LWZ:
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case PPC::LFS:
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case PPC::LFD:
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case PPC::STB:
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case PPC::STH:
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case PPC::STW:
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case PPC::STFS:
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case PPC::STFD:
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Reloc = PPC::reloc_absolute_low;
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break;
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}
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}
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if (MO.isGlobalAddress())
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MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
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Reloc, MO.getGlobal(), 0));
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else
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MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
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Reloc, MO.getSymbolName(), 0));
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} else if (MO.isMachineBasicBlock()) {
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unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
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BBRefs.push_back(std::make_pair(MO.getMachineBasicBlock(), CurrPC));
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} else if (MO.isConstantPoolIndex() || MO.isJumpTableIndex()) {
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if (MO.isConstantPoolIndex())
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rv = MCE.getConstantPoolEntryAddress(MO.getConstantPoolIndex());
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else
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rv = MCE.getJumpTableEntryAddress(MO.getJumpTableIndex());
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unsigned Opcode = MI.getOpcode();
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if (Opcode == PPC::LIS || Opcode == PPC::ADDIS) {
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// lis wants hi16(addr)
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if ((short)rv < 0) rv += 1 << 16;
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rv >>= 16;
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} else if (Opcode == PPC::LWZ || Opcode == PPC::LA ||
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Opcode == PPC::LI ||
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Opcode == PPC::LFS || Opcode == PPC::LFD) {
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// These load opcodes want lo16(addr)
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rv &= 0xffff;
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} else {
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assert(0 && "Unknown constant pool or jump table using instruction!");
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}
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} else {
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std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
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abort();
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}
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return rv;
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}
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#include "PPCGenCodeEmitter.inc"
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