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https://github.com/c64scene-ar/llvm-6502.git
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f31408d75c
to Eli for pointing out that these forms don't ignore the high bits of their index operands, and as such are not immediately suitable for use by isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62194 91177308-0d34-0410-b5e6-96231b3b80d8
29 lines
936 B
LLVM
29 lines
936 B
LLVM
; RUN: llvm-as < %s | llc | grep btl
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; RUN: llvm-as < %s | llc -mcpu=pentium4 | grep btl | not grep esp
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; RUN: llvm-as < %s | llc -mcpu=penryn | grep btl | not grep esp
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; PR3253
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; The register+memory form of the BT instruction should be usable on
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; pentium4, however it is currently disabled due to the register+memory
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; form having different semantics than the register+register form.
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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target triple = "i386-apple-darwin8"
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define void @test2(i32 %x, i32 %n) nounwind {
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entry:
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%tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
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%tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
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%tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
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br i1 %tmp4, label %bb, label %UnifiedReturnBlock
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bb: ; preds = %entry
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call void @foo()
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ret void
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UnifiedReturnBlock: ; preds = %entry
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ret void
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}
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declare void @foo()
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