mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-10 22:55:57 +00:00
value. Adjust other code to deal with that correctly. Make DAGTypeLegalizer::PromoteIntRes_EXTRACT_VECTOR_ELT take advantage of this new flexibility to simplify the code and make it deal with unusual vectors (like <4 x i1>) correctly. Fixes PR3037. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75176 91177308-0d34-0410-b5e6-96231b3b80d8
12 lines
339 B
LLVM
12 lines
339 B
LLVM
; RUN: llvm-as < %s | llc -march=x86
|
|
; PR3037
|
|
|
|
define void @entry(<4 x i8>* %dest) {
|
|
%1 = xor <4 x i1> zeroinitializer, < i1 true, i1 true, i1 true, i1 true >
|
|
%2 = extractelement <4 x i1> %1, i32 3
|
|
%3 = zext i1 %2 to i8
|
|
%4 = insertelement <4 x i8> zeroinitializer, i8 %3, i32 3
|
|
store <4 x i8> %4, <4 x i8>* %dest, align 1
|
|
ret void
|
|
}
|