mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-10 22:55:57 +00:00
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
996 B
LLVM
27 lines
996 B
LLVM
; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps
|
|
; PR1877
|
|
|
|
@NNTOT = weak global i32 0 ; <i32*> [#uses=1]
|
|
@G = weak global float 0.000000e+00 ; <float*> [#uses=1]
|
|
|
|
define void @runcont(i32* %source) nounwind {
|
|
entry:
|
|
%tmp10 = load i32* @NNTOT, align 4 ; <i32> [#uses=1]
|
|
br label %bb
|
|
|
|
bb: ; preds = %bb, %entry
|
|
%neuron.0 = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
|
|
%thesum.0 = phi float [ 0.000000e+00, %entry ], [ %tmp6, %bb ] ; <float> [#uses=1]
|
|
%tmp2 = getelementptr i32* %source, i32 %neuron.0 ; <i32*> [#uses=1]
|
|
%tmp3 = load i32* %tmp2, align 4 ; <i32> [#uses=1]
|
|
%tmp34 = sitofp i32 %tmp3 to float ; <float> [#uses=1]
|
|
%tmp6 = fadd float %tmp34, %thesum.0 ; <float> [#uses=2]
|
|
%indvar.next = add i32 %neuron.0, 1 ; <i32> [#uses=2]
|
|
%exitcond = icmp eq i32 %indvar.next, %tmp10 ; <i1> [#uses=1]
|
|
br i1 %exitcond, label %bb13, label %bb
|
|
|
|
bb13: ; preds = %bb
|
|
volatile store float %tmp6, float* @G, align 4
|
|
ret void
|
|
}
|