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https://github.com/c64scene-ar/llvm-6502.git
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27b1252c13
This changes the tests that were targeting ARM EABI to explicitly specify the environment rather than relying on the default. This breaks with the new Windows on ARM support when running the tests on Windows where the default environment is no longer EABI. Take the opportunity to avoid a pointless redirect (helps when trying to debug with providing a command line invocation which can be copy and pasted) and removing a few greps in favour of FileCheck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205541 91177308-0d34-0410-b5e6-96231b3b80d8
42 lines
1.8 KiB
LLVM
42 lines
1.8 KiB
LLVM
; RUN: llc -mtriple=arm-eabi -mattr=+neon -mcpu=cortex-a9 %s -o /dev/null
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define arm_aapcs_vfpcc <4 x float> @foo(i8* nocapture %pBuffer, i32 %numItems) nounwind {
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%1 = ptrtoint i8* %pBuffer to i32
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%lsr.iv2641 = inttoptr i32 %1 to float*
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%tmp29 = add i32 %1, 4
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%tmp2930 = inttoptr i32 %tmp29 to float*
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%tmp31 = add i32 %1, 8
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%tmp3132 = inttoptr i32 %tmp31 to float*
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%tmp33 = add i32 %1, 12
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%tmp3334 = inttoptr i32 %tmp33 to float*
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%tmp35 = add i32 %1, 16
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%tmp3536 = inttoptr i32 %tmp35 to float*
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%tmp37 = add i32 %1, 20
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%tmp3738 = inttoptr i32 %tmp37 to float*
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%tmp39 = add i32 %1, 24
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%tmp3940 = inttoptr i32 %tmp39 to float*
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%2 = load float* %lsr.iv2641, align 4
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%3 = load float* %tmp2930, align 4
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%4 = load float* %tmp3132, align 4
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%5 = load float* %tmp3334, align 4
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%6 = load float* %tmp3536, align 4
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%7 = load float* %tmp3738, align 4
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%8 = load float* %tmp3940, align 4
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%9 = insertelement <4 x float> undef, float %6, i32 0
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%10 = shufflevector <4 x float> %9, <4 x float> undef, <4 x i32> zeroinitializer
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%11 = insertelement <4 x float> %10, float %7, i32 1
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%12 = insertelement <4 x float> %11, float %8, i32 2
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%13 = insertelement <4 x float> undef, float %2, i32 0
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%14 = shufflevector <4 x float> %13, <4 x float> undef, <4 x i32> zeroinitializer
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%15 = insertelement <4 x float> %14, float %3, i32 1
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%16 = insertelement <4 x float> %15, float %4, i32 2
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%17 = insertelement <4 x float> %16, float %5, i32 3
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%18 = fsub <4 x float> zeroinitializer, %12
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%19 = shufflevector <4 x float> %18, <4 x float> undef, <4 x i32> zeroinitializer
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%20 = shufflevector <4 x float> %17, <4 x float> undef, <2 x i32> <i32 0, i32 1>
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%21 = shufflevector <2 x float> %20, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
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ret <4 x float> %21
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}
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